Intuition The one-sentence ideaRaw speed is useless if you can't afford the electricity or the cooling — so we measure hardware by how much useful work it does for each joule (or watt) it consumes , not just by how fast it goes.
Intuition The problem it solvesA datacenter's bill and a phone's battery life are both dominated by energy , not raw clock speed. Two chips can hit the same benchmark score, but if chip A does it at 100 W and chip B at 50 W, chip B is twice as valuable in practice. We needed one number that fuses performance and power , so engineers can compare fairly.
The tension:
Performance wants high clock frequency f f f V V V Power grows fast with both f f f V V V Beyond a "sweet spot," pushing performance costs disproportionately more power — this is why performance/watt exists as a design target.
Definition Performance per wattPerformance per Watt = Performance Power \text{Performance per Watt} = \frac{\text{Performance}}{\text{Power}} Performance per Watt = Power Performance Performance is throughput (operations/second, e.g. FLOPS or instructions/sec) and Power is average electrical power in watts (joules/sec).
Because performance is work per second and power is energy per second :
Perf Power = work / sec energy / sec = work energy = operations joule \frac{\text{Perf}}{\text{Power}} = \frac{\text{work}/\text{sec}}{\text{energy}/\text{sec}} = \frac{\text{work}}{\text{energy}} = \frac{\text{operations}}{\text{joule}} Power Perf = energy / sec work / sec = energy work = joule operations
Intuition The seconds cancel!Performance/watt is secretly operations per joule — the total useful work you can squeeze from a fixed energy budget (like a battery). That's why it's the honest efficiency number.
Total power in a CMOS chip:
P total = P dynamic + P static P_{\text{total}} = P_{\text{dynamic}} + P_{\text{static}} P total = P dynamic + P static
Intuition What's physically happeningEvery logic gate is basically a tiny capacitor C C C charge it to voltage V V V dump the charge. Energy stored on a capacitor is E = 1 2 C V 2 E = \tfrac12 C V^2 E = 2 1 C V 2 and discharging costs C V 2 CV^2 C V 2
Derivation:
Energy to charge one capacitor to V V V E stored = 1 2 C V 2 E_{\text{stored}} = \tfrac12 C V^2 E stored = 2 1 C V 2
The same amount is dissipated in the resistive path on discharge, so per switching event we lose E = 1 2 C V 2 E = \tfrac12 C V^2 E = 2 1 C V 2 1 2 C V 2 \tfrac12 CV^2 2 1 C V 2
If gates switch with activity factor α \alpha α f f f α f \alpha f α f
P dynamic = α C V 2 f \boxed{P_{\text{dynamic}} = \alpha \, C \, V^2 \, f} P dynamic = α C V 2 f
Even when nothing switches, transistors leak a trickle current I leak I_{\text{leak}} I leak P static = V I leak P_{\text{static}} = V \, I_{\text{leak}} P static = V I leak
Intuition Why efficiency collapses at high speedTo run faster you must raise f f f f f f higher V V V so transistors switch quickly enough (roughly f ∝ V f \propto V f ∝ V V ∝ f V \propto f V ∝ f P dyn = α C V 2 f P_{\text{dyn}} = \alpha C V^2 f P dyn = α C V 2 f P dyn ∝ f ⋅ f 2 = f 3 P_{\text{dyn}} \propto f \cdot f^2 = f^3 P dyn ∝ f ⋅ f 2 = f 3 Power scales roughly with the cube of frequency. Performance only scales linearly with f f f
Perf Watt ∝ f f 3 = 1 f 2 \frac{\text{Perf}}{\text{Watt}} \propto \frac{f}{f^3} = \frac{1}{f^2} Watt Perf ∝ f 3 f = f 2 1
Worked example Example 1 — Compute operations per jouleA GPU delivers 20 TFLOPS 20\ \text{TFLOPS} 20 TFLOPS 250 W 250\ \text{W} 250 W
Step 1: 20 × 10 12 FLOP/s 250 W = 8 × 10 10 FLOP/(s⋅W) = 80 GFLOPS/W \dfrac{20\times10^{12}\ \text{FLOP/s}}{250\ \text{W}} = 8\times10^{10}\ \text{FLOP/(s·W)} = 80\ \text{GFLOPS/W} 250 W 20 × 1 0 12 FLOP/s = 8 × 1 0 10 FLOP/(s⋅W) = 80 GFLOPS/W Why this step? Perf/watt is literally the division; units become FLOP per joule.
Step 2: Energy per FLOP = 1 8 × 10 10 = 12.5 pJ/FLOP = \dfrac{1}{8\times10^{10}} = 12.5\ \text{pJ/FLOP} = 8 × 1 0 10 1 = 12.5 pJ/FLOP Why this step? Reciprocal of ops/joule = joules/op. Confirms perf/watt ≡ work/energy.
Worked example Example 2 — Voltage scaling payoff (DVFS)A core runs at V = 1.0 V V=1.0\ \text{V} V = 1.0 V f = 2 GHz f=2\ \text{GHz} f = 2 GHz V = 0.8 V V=0.8\ \text{V} V = 0.8 V f = 1.6 GHz f=1.6\ \text{GHz} f = 1.6 GHz f ∝ V f\propto V f ∝ V
Step 1 — new power: P ∝ V 2 f P \propto V^2 f P ∝ V 2 f = ( 0.8 1.0 ) 2 ⋅ 1.6 2.0 = 0.64 × 0.8 = 0.512 = \left(\dfrac{0.8}{1.0}\right)^2 \cdot \dfrac{1.6}{2.0} = 0.64 \times 0.8 = 0.512 = ( 1.0 0.8 ) 2 ⋅ 2.0 1.6 = 0.64 × 0.8 = 0.512 Why this step? Only the relative factors matter, so plug ratios into V 2 f V^2f V 2 f 51% .
Step 2 — new performance: ∝ f \propto f ∝ f = 0.8 = 0.8 = 0.8 Why this step? Throughput tracks frequency.
Step 3 — perf/watt ratio: 0.8 0.512 = 1.5625 \dfrac{0.8}{0.512} = 1.5625 0.512 0.8 = 1.5625 Why this step? Perf/watt = perf ÷ power. We got +56% efficiency for only 20% less speed. This is why phones throttle down under load.
Worked example Example 3 — Choosing between two chipsChip A: 100 GFLOPS @ 40 W. Chip B: 160 GFLOPS @ 80 W. Which is more energy-efficient?
Step 1: A → 100 / 40 = 2.5 100/40 = 2.5 100/40 = 2.5 160 / 80 = 2.0 160/80 = 2.0 160/80 = 2.0 Why this step? Direct perf/watt comparison ignores absolute size and is fair.
Conclusion: A wins on efficiency (does more work per joule), even though B is faster . Pick by battery/thermal budget, not raw speed.
Common mistake "Faster chip = more efficient chip."Why it feels right: Speed and quality feel synonymous; a faster CPU finishes a task "sooner," so surely it uses less energy?
The fix: Finishing sooner (race-to-idle) sometimes helps, but the high f f f V V V P ∝ V 2 f P\propto V^2 f P ∝ V 2 f rise even though time falls. Always compute operations/joule , not just speed.
Common mistake "Halving voltage halves power."Why it feels right: Ohm's-law reflex: P = V I P=VI P = V I V V V The fix: Dynamic power is α C V 2 f \alpha C V^2 f α C V 2 f quadratic in V V V V V V f f f
Common mistake "Only dynamic power matters."Why it feels right: Textbooks lead with α C V 2 f \alpha C V^2 f α C V 2 f The fix: In modern deep-nanometer chips, leakage (P static = V I leak P_{\text{static}}=VI_{\text{leak}} P static = V I leak
Recall Feynman: explain to a 12-year-oldImagine your toy car runs on a battery. One car goes super fast but drains the battery in 5 minutes. Another goes a bit slower but plays for an hour. "Performance per watt" is asking: how much fun (work) do you get per bit of battery? Slow-and-steady often gives more total fun. And here's the trick: going twice as fast doesn't cost twice the battery — it can cost four or eight times more, because pushing speed needs more "push voltage," and battery drain grows with voltage squared . That's why fast gadgets get hot and die quick.
Mnemonic Remember the power law"Alpha Cats Voltage-Squared Frequency" → P = α C V 2 f P = \alpha C V^2 f P = α C V 2 f "Volts hurt squared, Hertz hurt cubed" (because f f f V V V P ∼ f 3 P\sim f^3 P ∼ f 3
Why do the "per second" units cancel in performance/watt?
Derive why P dyn ∝ f 3 P_{\text{dyn}}\propto f^3 P dyn ∝ f 3
Which drops faster when you lower V V V
Performance per watt is equivalent to what more fundamental quantity? Operations per joule (work per unit energy), because the "per second" in performance and power cancels.
Dynamic power equation for CMOS? P d y n = α C V 2 f P_{dyn} = \alpha C V^2 f P d y n = α C V 2 f (activity × capacitance × voltage² × frequency).
Why is dynamic power proportional to V 2 V^2 V 2 Energy stored/dissipated on a gate capacitor is
1 2 C V 2 \tfrac12 CV^2 2 1 C V 2 , and you pay that each switch.
Why does total power scale like f 3 f^3 f 3 Higher
f f f needs higher
V V V (roughly
V ∝ f V\propto f V ∝ f ); substituting into
V 2 f V^2 f V 2 f gives
f 3 f^3 f 3 .
If you halve voltage (holding frequency), what happens to dynamic power? It drops to one quarter (quadratic in
V V V ).
What is static/leakage power and its formula? Power lost by leakage current even when idle:
P s t a t i c = V I l e a k P_{static}=V\,I_{leak} P s t a t i c = V I l e ak ; grows with temperature.
Chip A: 100 GFLOPS @ 40 W, Chip B: 160 GFLOPS @ 80 W — which is more efficient? A (2.5 GFLOPS/W) beats B (2.0 GFLOPS/W), despite B being faster.
Why did the industry move to multicore instead of ever-higher clocks? Perf/watt falls like
1 / f 2 1/f^2 1/ f 2 at high frequency; more parallel cores at lower
f , V f,V f , V give better work-per-joule.
What does DVFS exploit? Dynamic Voltage & Frequency Scaling drops
V V V (quadratic power saving) for a smaller linear performance loss to boost perf/watt.
Steel-man: why does "faster = more efficient" feel right, and the fix? Feels right via race-to-idle; fix: total energy = power×time, and high
f f f needs high
V V V so power (
∝ V 2 f \propto V^2f ∝ V 2 f ) can rise more than time falls.
Capacitor energy half C V squared
Voltage and frequency sweet spot
Intuition Hinglish mein samjhoDekho, hardware me sirf "kitna fast hai" matlab nahi rakhta — asli sawaal hai kitna kaam per joule energy milta hai. Isko bolte hain performance per watt. Trick ye hai ki performance/watt actually operations-per-joule hi hota hai, kyunki "per second" upar aur neeche dono me cancel ho jaata hai. Toh jaise phone ki battery fixed hai, wahi chip achhi hai jo utni hi energy me zyada kaam nikaale.
Ab power kaise banti hai? CMOS chip me har gate ek chhota capacitor hai. Use charge karne me energy lagti hai 1 2 C V 2 \tfrac12 CV^2 2 1 C V 2 P = α C V 2 f P = \alpha C V^2 f P = α C V 2 f square aur frequency ka linear. Yaad rakho: "Volts hurt squared, Hertz hurt cubed." Kyun cubed? Kyunki fast chalane ke liye voltage bhi badhana padta hai (V ∝ f V \propto f V ∝ f V 2 f V^2 f V 2 f f 3 f^3 f 3
Isi wajah se perf/watt frequency ke saath 1 / f 2 1/f^2 1/ f 2 multicore aur DVFS (voltage-frequency thoda kam karke) apnaya — thoda slow chalao, par bahut zyada efficient. Exam aur real life dono me: jab do chip compare karo, sirf GFLOPS mat dekho, GFLOPS/W nikaalo. Slower chip bhi efficiency me jeet sakta hai — yahi 80/20 wali asli baat hai.
