Level 2 — RecallPower, Thermal & Reliability

Power, Thermal & Reliability

⏱ 30 minutes50 marksprintable — key stays hidden on paper

Chapter: 6.4 Power, Thermal & Reliability Difficulty Level: 2 (Recall / Standard problems / Short derivations) Time Limit: 30 minutes Total Marks: 50

Instructions: Answer all questions. Show working for numerical problems. Use $...$ notation where appropriate.

Q1. Define dynamic power and static power consumption in a CMOS circuit. State the primary physical cause of each. (4 marks)

Q2. The dynamic power of a CMOS circuit is given by $P_{dyn} = \alpha C V^2 f$ . (a) Identify each symbol. (2 marks) (b) A processor operates at $V = 1.2\text{ V}$ , $f = 2\text{ GHz}$ , with effective switched capacitance $C = 5\text{ nF}$ and activity factor $\alpha = 0.3$ . Calculate the dynamic power. (3 marks)

Q3. Explain what Dynamic Voltage and Frequency Scaling (DVFS) is and why scaling voltage yields a larger power saving than scaling frequency alone. (4 marks)

Q4. Using DVFS, a chip drops its voltage from $1.2\text{ V}$ to $1.0\text{ V}$ and its frequency from $2.0\text{ GHz}$ to $1.5\text{ GHz}$ . Assuming $\alpha$ and $C$ are unchanged, calculate the ratio of new dynamic power to old dynamic power. (4 marks)

Q5. Define Thermal Design Power (TDP). State whether TDP represents (a) maximum possible power draw, or (b) the sustained power the cooling system must dissipate, and justify your choice in one sentence. (4 marks)

Q6. Distinguish between clock gating and power gating. (a) State what each technique switches off. (2 marks) (b) State which technique reduces static (leakage) power and why. (3 marks)

Q7. A CPU die dissipates $95\text{ W}$ . The thermal path from junction to ambient has a total thermal resistance of $\theta_{JA} = 0.5\ ^\circ\text{C/W}$ , and the ambient temperature is $25\ ^\circ\text{C}$ . Calculate the steady-state junction temperature $T_J$ . (4 marks)

Q8. (a) Briefly explain thermal throttling and what triggers it. (2 marks) (b) Define the dark silicon problem and state its underlying cause. (3 marks)

Q9. (a) Define electromigration and state one design measure to improve resistance to it. (3 marks) (b) Explain voltage droop and state the role of decoupling capacitors in mitigating it. (3 marks)

Q10. Two processors run the same benchmark:

Processor A completes it in $40\text{ s}$ drawing $60\text{ W}$ .
Processor B completes it in $30\text{ s}$ drawing $90\text{ W}$ .

(a) Compute the energy consumed by each. (2 marks) (b) Which is more energy-efficient (performance per watt / lower energy) for this task? Justify. (2 marks)

End of Paper

Answer keyMark scheme & solutions

Q1. (4 marks)

Dynamic power = power consumed due to switching activity — charging/discharging load capacitances when transistors change state (plus short-circuit current during transitions). (2 marks: 1 def, 1 cause)
Static power = power consumed even when idle, primarily due to leakage currents (subthreshold + gate leakage) through transistors. (2 marks: 1 def, 1 cause)

Q2. (5 marks) (a) $\alpha$ = activity/switching factor; $C$ = switched capacitance; $V$ = supply voltage; $f$ = clock frequency. (2 marks, ½ each) (b) $P_{dyn} = \alpha C V^2 f = 0.3 \times 5\times10^{-9} \times (1.2)^2 \times 2\times10^{9}$ (1 mark setup) $= 0.3 \times 5\times10^{-9} \times 1.44 \times 2\times10^{9}$ $= 0.3 \times 1.44 \times 10 = 4.32\text{ W}$ (2 marks)

Q3. (4 marks)

DVFS = dynamically adjusting supply voltage and clock frequency at runtime to match workload demand, saving power when full performance isn't needed. (2 marks)
Voltage saving is larger because $P_{dyn} \propto V^2 f$ : power scales quadratically with voltage but only linearly with frequency. Lowering $V$ also permits lowering $f$ (since max $f$ depends on $V$ ), giving a near-cubic effective saving. (2 marks)

Q4. (4 marks) Ratio $= \dfrac{V_{new}^2 f_{new}}{V_{old}^2 f_{old}} = \dfrac{(1.0)^2 \times 1.5}{(1.2)^2 \times 2.0}$ (2 marks setup) $= \dfrac{1.0 \times 1.5}{1.44 \times 2.0} = \dfrac{1.5}{2.88} \approx 0.521$ (2 marks) So new power ≈ 52.1% of old (≈ 48% reduction).

Q5. (4 marks)

TDP = the maximum sustained (average) power the cooling solution must be designed to dissipate under a realistic heavy workload. (2 marks)
Correct choice: (b). (1 mark) Justification: TDP is a thermal/cooling specification, not an absolute electrical maximum; instantaneous/peak power can briefly exceed TDP (e.g., turbo boost). (1 mark)

Q6. (5 marks) (a) Clock gating switches off the clock signal to idle blocks (stops toggling). Power gating switches off the supply voltage (power rail) to idle blocks. (2 marks, 1 each) (b) Power gating reduces static/leakage power (1 mark) because it removes the supply voltage, cutting off leakage current paths; clock gating only stops switching (dynamic power) but the block remains powered and still leaks. (2 marks)

Q7. (4 marks) $T_J = T_A + P \times \theta_{JA}$ (1 mark formula) $= 25 + 95 \times 0.5$ (1 mark) $= 25 + 47.5 = 72.5\ ^\circ\text{C}$ (2 marks)

Q8. (5 marks) (a) Thermal throttling = automatically reducing clock frequency/voltage (or inserting idle cycles) when the chip temperature exceeds a safe threshold, to prevent overheating/damage. Triggered by on-die thermal sensors reaching a limit. (2 marks) (b) Dark silicon = the fraction of a chip's transistors that cannot be powered on simultaneously at full frequency within the power/thermal budget. (1.5 marks) Cause: the end of Dennard scaling — transistor density keeps increasing but per-transistor power no longer scales down proportionally, so not all can be active at once. (1.5 marks)

Q9. (6 marks) (a) Electromigration = gradual displacement of metal atoms in interconnects caused by momentum transfer from high-density electron flow, eventually causing voids (opens) or hillocks (shorts) → wire failure. (2 marks) Measure: widen wires / reduce current density / use more electromigration-resistant metals (e.g., copper vs aluminium). (1 mark) (b) Voltage droop = a transient dip in supply voltage when current demand rises sharply (di/dt across supply-network inductance/resistance). (1.5 marks) Decoupling capacitors store charge locally near the load and release it quickly to supply the sudden current, holding the voltage steady. (1.5 marks)

Q10. (4 marks) (a) Energy = Power × Time.

A: $E_A = 60 \times 40 = 2400\text{ J}$ (1 mark)
B: $E_B = 90 \times 30 = 2700\text{ J}$ (1 mark) (b) Processor A is more energy-efficient: it consumes less total energy (2400 J < 2700 J) for the same task. (2 marks) (Though B is faster, it uses more energy — A has better performance-per-watt for this workload in terms of energy.)

[
  {"claim":"Q2b dynamic power = 4.32 W","code":"alpha=Rational(3,10); C=5e-9; V=Rational(12,10); f=2e9; P=alpha*C*V**2*f; result = abs(float(P)-4.32) < 1e-9"},
  {"claim":"Q4 power ratio approx 0.5208","code":"ratio=(1.0**2*1.5)/(1.2**2*2.0); result = abs(ratio-0.520833333) < 1e-6"},
  {"claim":"Q7 junction temp = 72.5 C","code":"Tj=25+95*0.5; result = abs(Tj-72.5) < 1e-9"},
  {"claim":"Q10 energies 2400 and 2700 J, A more efficient","code":"Ea=60*40; Eb=90*30; result = (Ea==2400) and (Eb==2700) and (Ea<Eb)"}
]