Level 5 — MasteryPower, Thermal & Reliability

Power, Thermal & Reliability

⏱ 90 minutes60 marksprintable — key stays hidden on paper

Level 5 — Mastery (cross-domain: physics + mathematics + coding) Time limit: 90 minutes Total marks: 60

Notation: dynamic power $P_{dyn}=\alpha C V^2 f$ ; static (leakage) power $P_{stat}=V\,I_{leak}$ with $I_{leak}=I_0\,e^{-V_{th}/(n\,V_T)}$ , thermal voltage $V_T=kT/q$ . Steady-state die temperature $T=T_{amb}+P\,\theta_{JA}$ .

Question 1 — DVFS, energy-optimal operating point (24 marks)

A core executes a fixed workload of $W$ clock cycles. Its power model is $P(V,f)=\underbrace{\alpha C V^2 f}_{\text{dynamic}}+\underbrace{V I_{leak}}_{\text{static}},$ and, in the region of interest, the maximum stable frequency scales with voltage as $f = \beta\,(V - V_{th}).$

(a) The task must finish in a deadline of $D$ seconds. Show that operating at the lowest frequency that still meets the deadline (i.e. $f = W/D$ ) minimises the dynamic energy per task, and derive an expression for that dynamic energy $E_{dyn}$ in terms of $\alpha, C, W, \beta, V_{th}$ and $D$ . (7)

(b) Static energy per task is $E_{stat}=P_{stat}\cdot(W/f)$ . Explain, using your $E_{dyn}$ and $E_{stat}$ expressions, why lowering $f$ below some point increases total energy per task, and state the qualitative condition (in words + inequality on the derivative) that defines the energy-optimal frequency. (6)

(c) Take numbers: $\alpha C = 2\times10^{-9}\ \mathrm{F}$ , $\beta = 5\times10^{9}\ \mathrm{Hz/V}$ , $V_{th}=0.3\ \mathrm{V}$ , $I_{leak}=0.8\ \mathrm{A}$ (assume approximately voltage-independent for this part), $W = 3\times10^{9}$ cycles. Compute the total energy per task at $f_1=1\ \mathrm{GHz}$ and at $f_2=2\ \mathrm{GHz}$ . Which is more energy efficient, and by what percentage? (8)

(d) State one physical mechanism that eventually breaks the "lower $f$ always saves dynamic energy" assumption at very low voltage. (3)

Question 2 — Thermal budget, throttling & dark silicon (22 marks)

A chip has TDP $=95\ \mathrm{W}$ , package thermal resistance $\theta_{JA}=0.35\ \mathrm{^\circ C/W}$ , ambient $T_{amb}=35\ \mathrm{^\circ C}$ , and a throttle trip point $T_{max}=100\ \mathrm{^\circ C}$ .

(a) Compute the steady-state junction temperature at TDP. Is the cooling solution adequate? Compute the maximum sustainable power $P_{max}$ before the trip point is reached. (6)

(b) The chip has 16 identical cores. Each active core dissipates $9\ \mathrm{W}$ . Uncore/leakage floor is $12\ \mathrm{W}$ regardless. Compute the maximum number of cores that can run simultaneously without throttling. Explain how this quantitatively illustrates the dark silicon problem. (6)

(c) A transient burst raises power to $130\ \mathrm{W}$ . The die has heat capacity $C_{th}=0.9\ \mathrm{J/^\circ C}$ . Model temperature by $C_{th}\dfrac{dT}{dt}=P-\dfrac{T-T_{amb}}{\theta_{JA}}$ . Starting from the steady state of part (a), derive $T(t)$ and compute the time until the throttle trips at $100\ \mathrm{^\circ C}$ . (10)

Question 3 — Electromigration & voltage droop (14 marks)

(a) Black's equation gives median-time-to-failure $\mathrm{MTTF}=A\,J^{-n}\,e^{E_a/(kT)}$ , with $n=2$ , $E_a=0.7\ \mathrm{eV}$ , $k=8.617\times10^{-5}\ \mathrm{eV/K}$ . A wire has $\mathrm{MTTF}=10$ years at $T_1=350\ \mathrm{K}$ and fixed current density. Find the MTTF at $T_2=380\ \mathrm{K}$ . State the reliability implication for DVFS/turbo. (8)

(b) During a fast current step $\Delta I=20\ \mathrm{A}$ over $\Delta t = 2\ \mathrm{ns}$ the power-delivery network has effective inductance $L=15\ \mathrm{pH}$ . Compute the $L\,di/dt$ voltage droop. If the supply is $1.0\ \mathrm{V}$ with a $\pm5\%$ tolerance, does this violate the rail? State how a decoupling capacitor of $C=100\ \mathrm{nF}$ mitigates it (mechanism, one sentence). (6)

Answer keyMark scheme & solutions

Question 1

(a) (7 marks) Time to finish $W$ cycles at frequency $f$ is $t=W/f$ . Dynamic energy $E_{dyn}=P_{dyn}\cdot t=\alpha C V^2 f\cdot\frac{W}{f}=\alpha C V^2 W$ . (2) — energy depends only on $V$ , not directly on $f$ for a fixed cycle count. Since $f=\beta(V-V_{th})\Rightarrow V=V_{th}+f/\beta$ , lower $f$ ⇒ lower $V$ ⇒ lower $E_{dyn}$ (monotone in $V$ ). (2) The lowest $f$ meeting deadline $D$ is $f=W/D$ (finishing exactly on time). (1) Substituting: $E_{dyn}=\alpha C W\left(V_{th}+\frac{W}{\beta D}\right)^{2}.$ (2)

(b) (6 marks) $E_{stat}=P_{stat}\cdot W/f = V I_{leak}W/f$ . As $f\to0$ , $t=W/f\to\infty$ , so the core leaks for longer and $E_{stat}\to\infty$ . (3) Total $E=E_{dyn}(f)+E_{stat}(f)$ : $E_{dyn}$ decreases with $f$ but $E_{stat}$ increases as $1/f$ -ish (leakage integrated over longer time). The optimum is where the marginal saving in dynamic energy equals the marginal rise in static energy: $\frac{dE_{tot}}{df}=0,\quad \text{i.e. } \frac{dE_{dyn}}{df}=-\frac{dE_{stat}}{df}.$ (3)

(c) (8 marks) Voltage at each frequency: $V=V_{th}+f/\beta$ .

$f_1=1\times10^9$ : $V_1=0.3+ (1\times10^9)/(5\times10^9)=0.3+0.2=0.5\ \mathrm{V}$ .
$f_2=2\times10^9$ : $V_2=0.3+ (2\times10^9)/(5\times10^9)=0.3+0.4=0.7\ \mathrm{V}$ .

$E_{dyn}=\alpha C V^2 W = 2\times10^{-9}\cdot V^2\cdot 3\times10^9 = 6\,V^2$ J. $E_{stat}=V I_{leak}\,W/f = V\cdot0.8\cdot 3\times10^9/f$ .

At $f_1$ : $E_{dyn}=6(0.25)=1.5$ J; $E_{stat}=0.5\cdot0.8\cdot3=1.2$ J; $E_1=2.7$ J. (3) At $f_2$ : $E_{dyn}=6(0.49)=2.94$ J; $E_{stat}=0.7\cdot0.8\cdot1.5=0.84$ J; $E_2=3.78$ J. (3)

$f_1$ is more efficient. Difference $=(3.78-2.7)/3.78=28.6\%$ lower energy at $f_1$ . (2) (Accept " $E_2$ is $(3.78-2.7)/2.7=40\%$ higher than $E_1$ " if stated relative to $E_1$ .)

(d) (3 marks) At very low voltage leakage dominates and total energy rises (race-to-idle failure); also $V$ cannot drop below $V_{th}$ (or the near-threshold region) where the $f=\beta(V-V_{th})$ model breaks down and circuit reliability/variation and subthreshold conduction rise sharply. (Any one valid mechanism.)

Question 2

(a) (6 marks) $T=T_{amb}+P\theta_{JA}=35+95\times0.35=35+33.25=68.25\ \mathrm{^\circ C}$ . (2) Well below $100\ \mathrm{^\circ C}$ ⇒ cooling adequate. (2) $P_{max}=(T_{max}-T_{amb})/\theta_{JA}=(100-35)/0.35=185.7\ \mathrm{W}$ . (2)

(b) (6 marks) Power with $n$ cores: $P=12+9n\le P_{max}=185.7$ . (2) $9n\le173.7\Rightarrow n\le19.3$ ; but only 16 cores exist ⇒ all 16 can run: $P=12+144=156\ \mathrm{W}<185.7$ . (2) Here thermal ceiling permits all cores → not thermally limited. To illustrate dark silicon, if $\theta_{JA}$ or per-core power were higher (e.g. per-core 12 W: $12+12n\le185.7\Rightarrow n\le14.5$ , so only 14 of 16 usable), the remaining cores must stay dark. The point: with more cores than the power/thermal budget can sustain, a fraction must be powered off ("dark silicon"). (2)

(c) (10 marks) ODE: $C_{th}\dot T=P-(T-T_{amb})/\theta_{JA}$ . Let $\tau=C_{th}\theta_{JA}=0.9\times0.35=0.315\ \mathrm{s}$ . (2) Steady-state target for burst: $T_\infty=T_{amb}+P\theta_{JA}=35+130\times0.35=35+45.5=80.5\ \mathrm{^\circ C}$ ? — wait, $130\times0.35=45.5$ , so $T_\infty=80.5\ \mathrm{^\circ C}$ .

Since $T_\infty=80.5\ \mathrm{^\circ C}<100\ \mathrm{^\circ C}$ , the throttle never trips — the burst settles below the trip point. (3) Solution form: $T(t)=T_\infty+(T_0-T_\infty)e^{-t/\tau}$ with $T_0=68.25\ \mathrm{^\circ C}$ : $T(t)=80.5+(68.25-80.5)e^{-t/0.315}=80.5-12.25\,e^{-t/0.315}.$ (3) Setting $T=100$ has no solution ( $T<80.5$ always). Conclusion: trip time = ∞ (never trips); the transient is thermally safe. (2) (Full credit for correctly deriving $T_\infty=80.5\ \mathrm{^\circ C}$ and concluding no trip; recognising the trick is the mastery test.)

Question 3

(a) (8 marks) Same $J$ , so MTTF ratio depends only on temperature: $\frac{\mathrm{MTTF}_2}{\mathrm{MTTF}_1}=\exp\!\left[\frac{E_a}{k}\left(\frac1{T_2}-\frac1{T_1}\right)\right].$ (3) $\frac{E_a}{k}=0.7/8.617\times10^{-5}=8124.6\ \mathrm{K}$ . $\frac1{380}-\frac1{350}=0.0026316-0.0028571=-2.2556\times10^{-4}\ \mathrm{K^{-1}}$ . Exponent $=8124.6\times(-2.2556\times10^{-4})=-1.8326$ . Ratio $=e^{-1.8326}=0.1599$ . (3) $\mathrm{MTTF}_2=10\times0.1599=1.60$ years. (1) Implication: raising temperature (turbo/high V,f) sharply shortens interconnect lifetime — reliability budget limits sustained boost. (1)

(b) (6 marks) Droop $=L\,di/dt=15\times10^{-12}\times(20/2\times10^{-9})=15\times10^{-12}\times10^{10}=0.15\ \mathrm{V}=150\ \mathrm{mV}$ . (3) Tolerance is $\pm5\%$ of $1.0\ \mathrm{V}=\pm50\ \mathrm{mV}$ . $150\ \mathrm{mV}\gg50\ \mathrm{mV}$ ⇒ violates the rail. (2) Decap mechanism: the capacitor stores charge locally and supplies the fast transient current, holding $V$ up during the $di/dt$ event before the (inductive) main supply responds. (1)

[
  {"claim":"Q1c E1 total energy = 2.7 J", "code":"V1=Rational(1,2); Edyn1=6*V1**2; Estat1=V1*Rational(8,10)*3; result=(Edyn1+Estat1==Rational(27,10))"},
  {"claim":"Q1c E2 total energy = 3.78 J", "code":"V2=Rational(7,10); Edyn2=6*V2**2; Estat2=V2*Rational(8,10)*Rational(15,10); E2=Edyn2+Estat2; result=(E2==Rational(378,100))"},
  {"claim":"Q1c f1 is ~28.6% lower energy than f2", "code":"E1=Rational(27,10); E2=Rational(378,100); frac=(E2-E1)/E2; result=(abs(float(frac)-0.2857)<0.001)"},
  {"claim":"Q2a Pmax = 185.71 W", "code":"Pmax=(100-35)/Rational(35,100); result=(abs(float(Pmax)-185.714)<0.01)"},
  {"claim":"Q2c burst steady state 80.5C never reaches 100C", "code":"Tinf=35+130*Rational(35,100); result=(Tinf==Rational(805,10) and float(Tinf)<100)"},
  {"claim":"Q3a MTTF2 = 1.60 years", "code":"import sympy as sp; Ea=0.7; k=8.617e-5; ratio=sp.exp((Ea/k)*(1/380-1/350)); m2=10*ratio; result=(abs(float(m2)-1.60)<0.02)"},
  {"claim":"Q3b droop = 0.15 V", "code":"droop=15e-12*(20/2e-9); result=(abs(droop-0.15)<1e-9)"}
]