Level 4 — ApplicationPower, Thermal & Reliability

Power, Thermal & Reliability

⏱ 60 minutes60 marksprintable — key stays hidden on paper

Level: 4 — Application (novel problems, no hints) Time limit: 60 minutes Total marks: 60

Answer all questions. Show all working. State assumptions clearly. Use $P_{dyn}=\alpha C V^2 f$ where appropriate.

Question 1 — DVFS Energy Trade-off (14 marks)

A processor core runs a fixed workload of $W = 8 \times 10^9$ clock cycles. At its nominal operating point it uses $V_0 = 1.10\text{ V}$ , $f_0 = 3.2\text{ GHz}$ , with dynamic power $P_{dyn,0} = 22\text{ W}$ and static (leakage) power $P_{stat,0} = 6\text{ W}$ (constant, voltage-independent for this part).

(a) Compute the execution time and total energy (dynamic + static) at the nominal point. (3)

(b) The system applies DVFS, scaling to $V_1 = 0.90\text{ V}$ and $f_1 = 2.0\text{ GHz}$ . Assuming dynamic power scales as $\propto V^2 f$ and static power is unchanged, compute the new dynamic power, execution time, and total energy. (6)

(c) Compare total energy of the two points and state, with a one-line justification, whether DVFS reduced energy here even though it always reduces power. (3)

(d) Under what leakage condition would slowing down (a "race-to-idle" vs "crawl" decision) actually increase total energy? Explain in one or two sentences. (2)

Question 2 — Thermal Throttling & TDP Budget (12 marks)

A chip has $\text{TDP} = 65\text{ W}$ . Its cooling solution has thermal resistance $\theta_{JA} = 0.55\ ^\circ\text{C/W}$ (junction-to-ambient) and ambient temperature $T_A = 35\ ^\circ\text{C}$ . The maximum allowed junction temperature is $T_{J,max} = 100\ ^\circ\text{C}$ .

(a) Compute the steady-state junction temperature when dissipating exactly TDP. Is the cooling adequate? (3)

(b) Determine the maximum sustained power the chip can dissipate without exceeding $T_{J,max}$ . (3)

(c) A short "turbo" burst pushes power to 95 W. Given a lumped thermal capacitance $C_{th} = 12\text{ J}/^\circ\text{C}$ , estimate how long the burst can last starting from the steady TDP temperature of part (a) before throttling triggers at $T_{J,max}$ . Use the approximation that early in the transient the temperature rises roughly linearly: $\Delta T \approx (P - P_{steady})\,t / C_{th}$ . (4)

Question 3 — Electromigration & Interconnect Reliability (10 marks)

A power-delivery metal line is designed to Black's equation for mean-time-to-failure: $\text{MTTF} = \frac{A}{J^n}\exp\!\left(\frac{E_a}{k_B T}\right)$ with $n = 2$ , activation energy $E_a = 0.7\text{ eV}$ , and $k_B = 8.617\times10^{-5}\text{ eV/K}$ .

(a) A line qualified at $T_1 = 358\text{ K}$ (85 °C) has $\text{MTTF}_1 = 10\text{ years}$ . The chip actually runs at $T_2 = 383\text{ K}$ (110 °C) with the same current density. Compute the new MTTF. (5)

(b) To restore the original 10-year lifetime at $383\text{ K}$ by widening the wire (reducing $J$ ), by what factor must $J$ be reduced? (3)

(c) Give one architectural technique (other than widening wires) that reduces electromigration stress on power/clock lines, and explain why it helps. (2)

Question 4 — Voltage Droop & Decoupling (10 marks)

A core draws a current step of $\Delta I = 25\text{ A}$ within $\Delta t = 2\text{ ns}$ when it exits a clock-gated state. The power distribution network between the on-die decoupling and the load has parasitic inductance $L = 40\text{ pH}$ .

(a) Estimate the inductive ( $L\,di/dt$ ) voltage droop caused by this current step. (3)

(b) The nominal supply is $1.00\text{ V}$ with a guardband allowing a maximum droop of $80\text{ mV}$ . Does the droop in (a) violate the guardband? By how much? (2)

(c) To hold the droop within budget for the first $2\text{ ns}$ , a decoupling capacitor must supply the transient charge with voltage sag $\le 80\text{ mV}$ . Using $C \ge \dfrac{\Delta I \cdot \Delta t}{\Delta V}$ (charge-balance estimate, treating average transient current as $\Delta I / 2$ ... but here use full $\Delta I$ for a worst-case bound), compute the required decap. (3)

(d) Explain why placing decoupling capacitors physically closer to the switching logic improves droop performance. (2)

Question 5 — Dark Silicon & Performance-per-Watt (14 marks)

A many-core chip has $N = 64$ identical cores. Each active core dissipates $P_c = 2.0\text{ W}$ and delivers $S = 5$ GOPS (giga-operations/sec). The whole chip's power budget (TDP) is $90\text{ W}$ ; idle/gated cores dissipate negligible power.

(a) How many cores can be simultaneously active within the TDP? What fraction of the chip is "dark silicon"? (3)

(b) Compute the achievable aggregate throughput (GOPS) and the chip's performance-per-watt (GOPS/W) at this active-core count. (3)

(c) A designer proposes DVFS to run all 64 cores but at reduced voltage/frequency so total power stays at 90 W. Assume per-core power scales as $f^{3}$ (voltage tracks frequency linearly) and throughput scales linearly with $f$ , where $f=1$ corresponds to the 2.0 W / 5 GOPS nominal point. Find the per-core frequency scale $f$ that fits all 64 cores in 90 W, and the resulting aggregate throughput. (5)

(d) Compare the aggregate throughput of the "few cores at full speed" (part b) vs "all cores slowed" (part c) approaches, and state which is better for this throughput-oriented workload and why. (3)

Answer keyMark scheme & solutions

Question 1

(a) Execution time $t_0 = W/f_0 = 8\times10^9 / 3.2\times10^9 = 2.5\text{ s}$ . (1) Total power $= 22 + 6 = 28\text{ W}$ . Energy $E_0 = 28 \times 2.5 = 70\text{ J}$ . (2) Why: time = cycles/frequency; energy = total power × time.

(b) Dynamic power scales $\propto V^2 f$ : $P_{dyn,1} = 22 \times \left(\frac{0.90}{1.10}\right)^2 \times \frac{2.0}{3.2} = 22 \times 0.6694 \times 0.625 = 9.20\text{ W}.$ (3) Time $t_1 = 8\times10^9/2.0\times10^9 = 4.0\text{ s}$ . (1) Static energy $= 6 \times 4.0 = 24\text{ J}$ ; dynamic energy $= 9.20 \times 4.0 = 36.8\text{ J}$ . $E_1 = 36.8 + 24 = 60.8\text{ J}$ . (2)

(c) $E_1 = 60.8\text{ J} < E_0 = 70\text{ J}$ → DVFS reduced total energy by ~9.2 J (≈13%). (2) Justification: the $V^2$ reduction in dynamic energy outweighed the extra static energy from the longer runtime. (1)

(d) If static/leakage power is large, running slower stretches the time over which leakage is paid, so the added static energy ( $P_{stat}\Delta t$ ) can exceed the dynamic energy savings — favoring "race-to-idle" instead. (2)

Question 2

(a) $T_J = T_A + P\,\theta_{JA} = 35 + 65\times0.55 = 35 + 35.75 = 70.75\ ^\circ\text{C}$ . (2) Since $70.75 < 100$ , cooling is adequate (65 °C margin... 29.25 °C margin). (1)

(b) $P_{max} = (T_{J,max}-T_A)/\theta_{JA} = (100-35)/0.55 = 65/0.55 = 118.2\text{ W}$ . (3)

(c) Starting from $70.75\ ^\circ\text{C}$ , allowed rise $= 100 - 70.75 = 29.25\ ^\circ\text{C}$ . Net heating power $= 95 - 65 = 30\text{ W}$ (excess above steady dissipation). $t = C_{th}\,\Delta T / (P-P_{steady}) = 12 \times 29.25 / 30 = 11.7\text{ s}$ . (4)

(c-second) Real duration differs because the linear model ignores the increasing heat removal as $T_J$ rises (dissipation to ambient grows with $\Delta T$ ), so temperature actually rises sub-linearly (RC exponential) and the burst can last longer than the linear estimate. (2)

Question 3

(a) Same $J$ , so MTTF ratio depends only on the Arrhenius term: $\frac{\text{MTTF}_2}{\text{MTTF}_1} = \exp\!\left[\frac{E_a}{k_B}\left(\frac1{T_2}-\frac1{T_1}\right)\right].$ $\frac{E_a}{k_B} = 0.7/8.617\times10^{-5} = 8123.5\text{ K}$ . (1) $\frac1{383}-\frac1{358} = 0.0026110 - 0.0027933 = -1.8228\times10^{-4}$ . (1) Exponent $= 8123.5 \times (-1.8228\times10^{-4}) = -1.4808$ . (1) $e^{-1.4808}=0.2274$ . (1) $\text{MTTF}_2 = 10 \times 0.2274 = 2.27\text{ years}$ . (1)

(b) With $n=2$ , MTTF $\propto J^{-2}$ . To recover a factor $1/0.2274 = 4.398\times$ in MTTF: $J_{new}/J_{old} = (0.2274)^{1/2} = 0.4769$ . (2) So $J$ must be reduced by factor $\approx 0.48$ (≈2.1× wider effective cross-section). (1)

(c) Any valid: e.g. activity/current spreading (rotate hot lines, balance current across redundant vias) reduces peak $J$ ; or lowering supply/DVFS reduces current; or bidirectional current (AC) allows self-healing backflow of atoms. Explanation of why $J$ or thermal stress drops. (2)

Question 4

(a) $V_{droop}=L\,\frac{di}{dt}=40\times10^{-12}\times\frac{25}{2\times10^{-9}} = 40\times10^{-12}\times1.25\times10^{10}=0.5\text{ V} = 500\text{ mV}$ . (3)

(b) 500 mV ≫ 80 mV guardband → violated, exceeding by $500-80=420\text{ mV}$ . (2)

(c) $C \ge \dfrac{\Delta I\cdot\Delta t}{\Delta V} = \dfrac{25\times2\times10^{-9}}{0.080} = \dfrac{5\times10^{-8}}{0.080}=6.25\times10^{-7}\text{ F}=0.625\ \mu\text{F}$ . (3)

(d) Closer placement reduces the parasitic loop inductance and resistance between decap and load, so the cap can supply transient charge with lower $L\,di/dt$ and IR drop, cutting the droop. (2)

Question 5

(a) Active cores $= \lfloor 90/2.0\rfloor = 45$ cores. (1) Dark fraction $= (64-45)/64 = 19/64 = 0.297 \approx 29.7\%$ . (2)

(b) Throughput $= 45 \times 5 = 225\text{ GOPS}$ . (1) Power used $=45\times2=90\text{ W}$ ; perf/W $=225/90 = 2.5\text{ GOPS/W}$ . (2)

(c) Per-core power at scale $f$ : $2.0\,f^3$ . All 64 cores: $64\times2.0\,f^3 = 90$ . $f^3 = 90/128 = 0.7031 \Rightarrow f = 0.8891$ . (3) Per-core throughput $=5f = 4.446$ GOPS; aggregate $=64\times4.446 = 284.5\text{ GOPS}$ . (2)

(d) All-cores-slowed gives 284.5 GOPS vs 225 GOPS — about 26% higher throughput for the same 90 W. Because power grows cubically with $f$ but throughput only linearly, spreading work across many slow cores is more energy-efficient (higher perf/W: 284.5/90 = 3.16 GOPS/W), so the "all cores slowed" approach wins for parallel throughput workloads. (3)

[
  {"claim":"Q1b new dynamic power 9.20 W and total energy 60.8 J","code":"Pd1=22*(0.9/1.1)**2*(2.0/3.2); t1=8e9/2.0e9; E1=Pd1*t1+6*t1; result = abs(Pd1-9.2)<0.05 and abs(E1-60.8)<0.2"},
  {"claim":"Q2 Pmax=118.2W and burst time 11.7s","code":"Pmax=(100-35)/0.55; Ts=35+65*0.55; t=12*(100-Ts)/(95-65); result = abs(Pmax-118.18)<0.1 and abs(t-11.7)<0.1"},
  {"claim":"Q3 MTTF2 approx 2.27 years and J reduction factor 0.477","code":"Ea=0.7;kB=8.617e-5;ratio=exp(Ea/kB*(1/383-1/358)); M2=10*ratio; Jf=ratio**Rational(1,2); result = abs(float(M2)-2.27)<0.05 and abs(float(Jf)-0.477)<0.01"},
  {"claim":"Q5c frequency scale 0.889 and aggregate throughput 284.5 GOPS","code":"f=(90/128)**Rational(1,3); thru=64*5*f; result = abs(float(f)-0.8891)<0.005 and abs(float(thru)-284.5)<1"},
  {"claim":"Q4a droop 0.5V and Q4c decap 0.625uF","code":"V=40e-12*(25/2e-9); C=25*2e-9/0.080; result = abs(V-0.5)<1e-6 and abs(C-6.25e-7)<1e-9"}
]