Intuition The big picture (WHY these exist)Today's memory has an ugly gap. SRAM is fast but volatile and huge (6 transistors/bit). DRAM is dense but volatile and must be refreshed. Flash is non-volatile but slow to write and wears out . Emerging memories all chase one dream: the "universal memory" — fast like DRAM, non-volatile like Flash, dense, low-power, and endurant.
The trick they share: store a bit as a physical resistance state of a material, not as electric charge. High resistance = one bit, low resistance = the other. Because resistance is a stable physical property , it survives power loss — that's the non-volatility. This whole family is called resistive / non-volatile RAM (NVRAM) .
Definition The three technologies
MRAM (Magnetoresistive RAM) — a bit is stored in the magnetic orientation of a nanomagnet. Resistance depends on whether two magnetic layers are parallel or anti-parallel (the Magnetic Tunnel Junction , MTJ).ReRAM / RRAM (Resistive RAM) — a bit is stored by forming or rupturing a conductive filament inside a metal-oxide dielectric (a memristor -like device).PCM (Phase-Change Memory) — a bit is stored in the atomic phase of a chalcogenide (e.g. Ge₂Sb₂Te₅ = "GST"): crystalline (low resistance) vs amorphous (high resistance).
All three are two-terminal resistive cells , usually placed in a crossbar / 1T1R array (one selector transistor + one resistor).
Intuition WHY resistance depends on magnetismSandwich two ferromagnetic layers around a thin insulating barrier (~1 nm MgO). Electrons tunnel through the barrier. Quantum mechanically, an electron of a given spin tunnels easily into a layer whose electrons mostly share that spin, and poorly into one that doesn't.
Parallel (P) magnetizations → spins line up → many available states → low resistance R P R_P R P .Anti-parallel (AP) → spins mismatch → few states → high resistance R A P R_{AP} R A P .
Intuition WHY a voltage changes resistanceIn a metal/oxide/metal cell, a strong field drifts oxygen vacancies (or metal ions) to line up into a nanoscale conductive filament bridging the electrodes.
SET: filament forms → Low Resistance State (LRS) .RESET: opposite polarity ruptures it → High Resistance State (HRS) .
First-ever use needs a one-time high-voltage forming step to create the initial filament.
Worked example Example 1 — Compute TMRGiven R P = 2 k Ω R_P = 2\text{ k}\Omega R P = 2 k Ω R A P = 6 k Ω R_{AP}=6\text{ k}\Omega R A P = 6 k Ω TMR = 6 − 2 2 = 2.0 = 200 % . \text{TMR}=\frac{6-2}{2}=2.0=200\%. TMR = 2 6 − 2 = 2.0 = 200%. Why this step? We plug into the definition; normalising by R P R_P R P
Worked example Example 2 — Read voltage dividerV r e a d = 0.2 V_{read}=0.2 V r e a d = 0.2 R L = 5 k Ω R_L=5\text{ k}\Omega R L = 5 k Ω R L R S = 1 k Ω R_{LRS}=1\text{ k}\Omega R L R S = 1 k Ω R H R S = 100 k Ω R_{HRS}=100\text{ k}\Omega R H R S = 100 k Ω
LRS: V s e n s e = 0.2 ⋅ 5 5 + 1 = 0.167 V_{sense}=0.2\cdot\frac{5}{5+1}=0.167 V se n se = 0.2 ⋅ 5 + 1 5 = 0.167
HRS: V s e n s e = 0.2 ⋅ 5 5 + 100 = 0.0095 V_{sense}=0.2\cdot\frac{5}{5+100}=0.0095 V se n se = 0.2 ⋅ 5 + 100 5 = 0.0095 Why this step? Series divider from Ohm's law. The ~0.16 V separation is huge → trivially sensed. This is why designers pick R L R_L R L
Worked example Example 3 — PCM RESET energy intuitionIf RESET needs a temperature rise Δ T = 550 \Delta T=550 Δ T = 550 C t h = 1 fJ/K C_{th}=1\text{ fJ/K} C t h = 1 fJ/K t = 50 t=50 t = 50 R = 10 k Ω R=10\text{ k}\Omega R = 10 k Ω I 2 R t = C t h Δ T = 550 I^2Rt = C_{th}\Delta T = 550 I 2 R t = C t h Δ T = 550 I 2 = 550 fJ 10 k Ω ⋅ 50 ns = 550 × 10 − 15 J ( 10 4 ) ( 5 × 10 − 8 ) Ω s = 1.1 × 10 − 9 A 2 I^2 = \dfrac{550\text{ fJ}}{10\text{ k}\Omega\cdot 50\text{ ns}} = \dfrac{550\times10^{-15}\text{ J}}{(10^4)(5\times10^{-8})\text{ }\Omega\text{s}} = 1.1\times10^{-9}\text{ A}^2 I 2 = 10 k Ω ⋅ 50 ns 550 fJ = ( 1 0 4 ) ( 5 × 1 0 − 8 ) Ω s 550 × 1 0 − 15 J = 1.1 × 1 0 − 9 A 2 I = 1.1 × 10 − 9 ≈ 33 μ I=\sqrt{1.1\times10^{-9}}\approx 33\,\mu I = 1.1 × 1 0 − 9 ≈ 33 μ Why this step? Equate deposited electrical energy to the thermal energy needed. Shows RESET current scales with the volume you must melt — shrinking the cell lowers this current, driving PCM scaling.
Property
MRAM (STT)
ReRAM
PCM
(DRAM)
(Flash)
Store bit as
magnetic orientation
filament
atomic phase
charge
charge
Non-volatile
✅
✅
✅
❌
✅
Endurance (writes)
~10 15 10^{15} 1 0 15
~10 6 10^6 1 0 6 10 9 10^9 1 0 9
~10 8 10^8 1 0 8 10 9 10^9 1 0 9
~10 16 10^{16} 1 0 16
~10 4 10^4 1 0 4 10 5 10^5 1 0 5
Write speed
fast (~ns)
fast (~ns)
slower (~10s ns)
ns
slow (µs–ms)
Write energy
low–med
low
high (RESET) low
high
Main weakness
small memory window, cost
variability
RESET power
volatile
slow, wears out
80/20 takeaway: MRAM = best endurance & speed (cache-like). PCM = best density & multi-level, but power-hungry. ReRAM = simplest/cheapest, great for crossbars & in-memory computing, but noisy.
Common mistake Steel-manned misconceptions"They store charge like DRAM/Flash, so leakage erases them."
Why it feels right: every memory you learned about (SRAM/DRAM/Flash) uses charge, and charge leaks → volatility. The fix: emerging memories store a structural/physical state (magnetic, phase, filament). No charge to leak ⇒ non-volatile even with power off.
"Bigger TMR just means faster."
Why it feels right: everything good seems to correlate. Fix: TMR is a read margin (how distinguishable the states are), not a write speed. Write speed depends on the critical current/torque dynamics.
"PCM SET (crystallize) is the hot, expensive step."
Why it feels right: crystallizing sounds energetic. Fix: RESET (amorphize/melt) is hotter (must exceed melting point + fast quench). SET only anneals at a lower temperature.
"Higher resistance state is always the '1'."
Fix: the bit-to-state mapping is a convention chosen by the designer; what matters is a large, reliable window between the two states.
Recall Feynman: explain to a 12-year-oldImagine a light switch that stays where you left it even after you unplug the house. Normal computer memory is like a switch held by someone's finger — let go (power off) and it flips back. These new memories are different: to store a "1" you actually change the material — you turn a tiny magnet around (MRAM), melt-and-freeze a speck of glass (PCM), or grow a tiny metal wire inside (ReRAM). To read it back, you just check "does electricity flow easily or not?" Because you changed the stuff itself , it remembers with no battery — like carving a groove instead of holding a ball on a hill.
Mnemonic Remember the three"MRAM Magnets, ReRAM Rivers (filaments), PCM Phases."
And for PCM temperature: "RESET = Reach melting (hot); SET = Soft anneal (warm)."
What physical quantity stores the bit in all three emerging memories? Resistance state (high vs low), not electric charge — that's why they're non-volatile.
In MRAM, why does anti-parallel give higher resistance? Spin mismatch across the tunnel barrier leaves fewer available states for tunneling electrons → less current → higher R.
Define TMR. ( R A P − R P ) / R P (R_{AP}-R_P)/R_P ( R A P − R P ) / R P ; the normalized read margin between magnetic states.
Which PCM operation needs the most energy and why? RESET (amorphize) — must Joule-heat GST above its melting point then quench fast.
PCM SET vs RESET in terms of resistance? SET → crystalline → low R; RESET → amorphous → high R.
How does ReRAM SET the low-resistance state? A voltage drifts oxygen vacancies/ions to form a conductive filament bridging the electrodes.
What is the ReRAM "forming" step? A one-time higher-voltage operation to create the initial filament in a fresh cell.
Formula for sensed voltage in a resistive read divider? V s e n s e = V r e a d R L / ( R L + R c e l l ) V_{sense}=V_{read}\,R_L/(R_L+R_{cell}) V se n se = V r e a d R L / ( R L + R ce l l ) , from Ohm's law on the series pair.
Why does a large R H R S / R L R S R_{HRS}/R_{LRS} R H R S / R L R S It widens the "memory window," making the two states easy for the sense amp to distinguish.
Which emerging memory has the best write endurance? STT-MRAM (~
10 15 10^{15} 1 0 15 cycles), near DRAM-level.
What is STT (in MRAM writing)? Spin-Transfer Torque — a spin-polarized current above a critical value flips the free magnetic layer.
What is "1T1R"? One selector transistor + one resistive element per cell, the common array structure.
PCM Joule-heating temperature relation? Δ T ≈ I 2 R t / C t h \Delta T \approx I^2 R t / C_{th} Δ T ≈ I 2 R t / C t h — deposited energy over thermal capacitance (
Δ T \Delta T Δ T is a rise in kelvins).
SRAM and DRAM — the volatile, charge-based memories these aim to replaceFlash Memory — non-volatile but slow/low-endurance benchmarkMemristor — theoretical basis for ReRAM behaviorMemory Hierarchy — MRAM as potential non-volatile cache/last-levelIn-Memory Computing — ReRAM/PCM crossbars for analog matrix multiplyOhms Law and Voltage Divider — underpin resistive sensingJoule Heating — physics of PCM switching
Memory gap SRAM DRAM Flash
Resistance state not charge
TMR ratio RAP minus RP over RP
Amorphous high-R vs crystalline low-R
Intuition Hinglish mein samjhoDekho, purani memory ka ek basic problem hai: SRAM/DRAM/Flash sab charge store karte hain (capacitor ya floating gate me electron). Charge leak hota hai, isliye power jaate hi data udd jaata hai (volatile), aur Flash slow aur jaldi ghis (wear out) jaata hai. Emerging memories — MRAM, ReRAM, PCM — ek naye idea pe kaam karte hain: bit ko resistance state ki tarah store karo. High resistance = ek bit, low resistance = doosra bit. Resistance ek physical property hai material ki, isliye power off hone pe bhi yaad rehta hai — yehi non-volatility hai.
Teeno alag-alag physics use karte hain. MRAM me do chhote magnet hote hain ek patli insulator (MgO) ke aas-paas — dono same direction (parallel) me ho to current easily flow karta hai (low R), opposite (anti-parallel) me ho to resistance high. Isko naapne ke liye TMR = (R_AP − R_P)/R_P use karte hain, jitna bada utna clear read. PCM me GST naam ka glass melt-freeze karke amorphous (high R) ya dheere anneal karke crystalline (low R) banate hain — heat se, Δ T = I 2 R t / C t h \Delta T = I^2Rt/C_{th} Δ T = I 2 R t / C t h Δ T \Delta T Δ T rise hai kelvin me). Yaad rakho: RESET (melt) sabse hot aur power-hungry step hai. ReRAM me oxide ke andar ek chhota conductive filament banta/tootta hai — banta to low R, tootta to high R.
Padhne ka tarika same hai teeno me: chhota sa V r e a d V_{read} V r e a d V s e n s e = V r e a d ⋅ R L / ( R L + R c e l l ) V_{sense}=V_{read}\cdot R_L/(R_L+R_{cell}) V se n se = V r e a d ⋅ R L / ( R L + R ce l l ) memory window (HRS aur LRS ka ratio) jitna bada, sensing utni aasaan aur reliable. Exam ke liye 80/20: MRAM = best endurance + fast (cache jaisa), PCM = dense but power problem, ReRAM = sasta aur simple, crossbar/in-memory computing ke liye best.
