4.1.12
Intuition Badi picture (WHY ye exist karte hain)Aaj ki memory mein ek bura gap hai. SRAM fast hai lekin volatile hai aur bahut badi hai (6 transistors/bit). DRAM dense hai lekin volatile hai aur use refresh karna padta hai. Flash non-volatile hai lekin likhne mein slow hai aur ghis jaati hai . Emerging memories sab ek sapne ke peeche bhaag rahi hain: "universal memory" — DRAM jaisi fast, Flash jaisi non-volatile, dense, low-power, aur zyada endurance wali.
Inki shared trick yeh hai: bit ko ek material ki physical resistance state mein store karo, electric charge mein nahi. High resistance = ek bit, low resistance = doosri. Kyunki resistance ek stable physical property hai, yeh power loss ke baad bhi survive karti hai — yahi non-volatility hai. Is poori family ko resistive / non-volatile RAM (NVRAM) kehte hain.
Definition Teen technologies
MRAM (Magnetoresistive RAM) — ek bit ek nanomagnet ki magnetic orientation mein store hoti hai. Resistance depend karti hai is baat par ki do magnetic layers parallel hain ya anti-parallel (yahi Magnetic Tunnel Junction , MTJ hai).ReRAM / RRAM (Resistive RAM) — ek bit ek metal-oxide dielectric ke andar conductive filament banana ya todne se store hoti hai (yeh ek memristor -jaisa device hai).PCM (Phase-Change Memory) — ek bit ek chalcogenide (jaise Ge₂Sb₂Te₅ = "GST") ki atomic phase mein store hoti hai: crystalline (low resistance) vs amorphous (high resistance).
Teeno two-terminal resistive cells hain, jo generally ek crossbar / 1T1R array mein rakhi jaati hain (ek selector transistor + ek resistor).
Intuition WHY resistance magnetism par depend karti haiDo ferromagnetic layers ke beech ek patla insulating barrier (~1 nm MgO) ka sandwich banao. Electrons barrier ke through tunnel karte hain. Quantum mechanically, ek certain spin wala electron aasaani se uss layer mein tunnel karta hai jiske electrons mostly usi spin ke hain, aur mushkil se uss layer mein jis mein nahi hain.
Parallel (P) magnetizations → spins align ho jaate hain → zyada available states → low resistance R P .Anti-parallel (AP) → spins match nahi karte → kam states → high resistance R A P .
Intuition WHY heat bit set karti haiGST ke do solid phases hote hain. Current daalo → Joule heating P = I 2 R
RESET (→ amorphous, high‑R): melting point se upar garm karo, phir jaldi quench karo → atoms disordered freeze ho jaate hain.SET (→ crystalline, low‑R): intermediate temperature par garm karo aur hold karo → atoms ek ordered lattice mein anneal ho jaate hain.
State ko low voltage par padha jaata hai (itna chota ki garm na kar sake).
Intuition WHY ek voltage resistance badal deti haiEk metal/oxide/metal cell mein, ek strong field oxygen vacancies (ya metal ions) ko drift karata hai taaki woh ek nanoscale conductive filament mein line up ho jaayein jo electrodes ko bridge kare.
SET: filament banta hai → Low Resistance State (LRS) .RESET: opposite polarity use se toot jaata hai → High Resistance State (HRS) .
Pehli baar use karne par ek one-time high-voltage forming step chahiye hoti hai jo initial filament create kare.
Worked example Example 1 — TMR calculate karoDiya gaya R P = 2 k Ω R A P = 6 k Ω TMR = 2 6 − 2 = 2.0 = 200%. Yeh step kyun? Hum definition mein plug kar rahe hain; R P
Worked example Example 2 — Read voltage dividerV r e a d = 0.2 R L = 5 k Ω R L R S = 1 k Ω R H R S = 100 k Ω
LRS: V se n se = 0.2 ⋅ 5 + 1 5 = 0.167
HRS: V se n se = 0.2 ⋅ 5 + 100 5 = 0.0095 Yeh step kyun? Ohm's law se series divider. ~0.16 V ka separation bahut bada hai → aasaani se sense hoga. Isliye designers R L
Worked example Example 3 — PCM RESET energy intuitionAgar RESET ke liye temperature rise Δ T = 550 C t h = 1 fJ/K t = 50 R = 10 k Ω I 2 R t = C t h Δ T = 550 I 2 = 10 k Ω ⋅ 50 ns 550 fJ = ( 1 0 4 ) ( 5 × 1 0 − 8 ) Ω s 550 × 1 0 − 15 J = 1.1 × 1 0 − 9 A 2 I = 1.1 × 1 0 − 9 ≈ 33 μ Yeh step kyun? Deposit hua electrical energy ko required thermal energy ke barabar rakh rahe hain. Yeh dikhata hai ki RESET current us volume ke saath scale karti hai jise melt karna hai — cell ko chhota karne par yeh current kam hoti hai, jo PCM scaling ko drive karti hai.
Property
MRAM (STT)
ReRAM
PCM
(DRAM)
(Flash)
Bit store karte hain
magnetic orientation
filament
atomic phase
charge
charge
Non-volatile
✅
✅
✅
❌
✅
Endurance (writes)
~1 0 15
~1 0 6 1 0 9
~1 0 8 1 0 9
~1 0 16
~1 0 4 1 0 5
Write speed
fast (~ns)
fast (~ns)
slower (~10s ns)
ns
slow (µs–ms)
Write energy
low–med
low
high (RESET) low
high
Main weakness
chhota memory window, cost
variability
RESET power
volatile
slow, wears out
80/20 takeaway: MRAM = best endurance & speed (cache-jaisi). PCM = best density & multi-level, lekin power-hungry. ReRAM = sabse simple/sasta, crossbars & in-memory computing ke liye great, lekin noisy.
Common mistake Steel-manned misconceptions"Ye DRAM/Flash ki tarah charge store karte hain, isliye leakage inhe erase kar deta hai."
Sahi kyun lagta hai: har memory jo tumne padhi (SRAM/DRAM/Flash) charge use karti hai, aur charge leak hota hai → volatility. Fix: emerging memories ek structural/physical state store karti hain (magnetic, phase, filament). Koi charge leak nahi hota ⇒ power off hone par bhi non-volatile.
"Bada TMR sirf iska matlab faster hai."
Sahi kyun lagta hai: sab kuch accha ek saath correlate lagta hai. Fix: TMR ek read margin hai (do states kitni distinguishable hain), write speed nahi. Write speed critical current/torque dynamics par depend karti hai.
"PCM SET (crystallize) hot, expensive step hai."
Sahi kyun lagta hai: crystallizing energetic lagti hai. Fix: RESET (amorphize/melt) zyada garam hota hai (melting point se upar jaana padta hai + fast quench). SET sirf lower temperature par anneal karta hai.
"Higher resistance state hamesha '1' hoti hai."
Fix: bit-to-state mapping ek convention hai jo designer choose karta hai; jo matter karta hai woh hai do states ke beech ek bada, reliable window.
Recall Feynman: 12-saal ke bachche ko samjhaoSocho ek light switch jo wahi reh ta hai jahan tumne chhoda, chahe ghar ka plug bhi nikal lo. Normal computer memory ek aisi switch jaisi hai jise koi apni ungli se pakde hue hai — chodo (power off) aur woh wapas palat jaati hai. Ye nayi memories alag hain: "1" store karne ke liye tum actually material ko badal dete ho — ek tiny magnet ghuma dete ho (MRAM), kuch glass pighlaate aur freeze karte ho (PCM), ya andar ek tiny metal wire ugaate ho (ReRAM). Wapas padhne ke liye, bas check karo "kya electricity aasaani se flow karti hai ya nahi?" Kyunki tumne cheez ko hi badal diya, yeh bina battery ke yaad rakhti hai — jaise kisi ki haath thamne ki jagah groove kaat dena.
"MRAM Magnets, ReRAM Rivers (filaments), PCM Phases."
Aur PCM temperature ke liye: "RESET = Reach melting (hot); SET = Soft anneal (warm)."
Teeno emerging memories mein bit store karne wali physical quantity kya hai? Resistance state (high vs low), electric charge nahi — isliye ye non-volatile hain.
MRAM mein anti-parallel higher resistance kyun deta hai? Tunnel barrier ke across spin mismatch se tunneling electrons ke liye kam available states hote hain → kam current → zyada R.
TMR define karo. ( R A P − R P ) / R P
Kaunsa PCM operation sabse zyada energy leta hai aur kyun? RESET (amorphize) — GST ko Joule-heat karke melting point se upar le jaana padta hai phir fast quench karna padta hai.
PCM SET vs RESET resistance ke terms mein? SET → crystalline → low R; RESET → amorphous → high R.
ReRAM low-resistance state kaise SET karta hai? Ek voltage oxygen vacancies/ions ko drift karaata hai jo electrodes ko bridge karne wala conductive filament banaata hai.
ReRAM ka "forming" step kya hai? Ek fresh cell mein initial filament create karne ke liye ek one-time higher-voltage operation.
Resistive read divider mein sensed voltage ka formula? V se n se = V r e a d R L / ( R L + R ce l l )
Bada R H R S / R L R S Yeh "memory window" ko badhaata hai, do states ko sense amp ke liye aasaani se distinguish karne layak banaata hai.
Sabse best write endurance wali emerging memory kaunsi hai? STT-MRAM (~1 0 15
MRAM writing mein STT kya hai? Spin-Transfer Torque — ek critical value se upar ka spin-polarized current free magnetic layer ko flip kar deta hai.
"1T1R" kya hai? Ek selector transistor + ek resistive element per cell, common array structure.
PCM Joule-heating temperature relation? Δ T ≈ I 2 R t / C t h Δ T
SRAM aur DRAM — volatile, charge-based memories jinhe ye replace karna chahti hainFlash Memory — non-volatile lekin slow/low-endurance benchmarkMemristor — ReRAM behavior ka theoretical basisMemory Hierarchy — MRAM potential non-volatile cache/last-level ke roop meinIn-Memory Computing — analog matrix multiply ke liye ReRAM/PCM crossbarsOhms Law aur Voltage Divider — resistive sensing ki neenvJoule Heating — PCM switching ki physics
Memory gap SRAM DRAM Flash
Resistance state not charge
TMR ratio RAP minus RP over RP
Amorphous high-R vs crystalline low-R
