Pass-transistor logic: Foundations — Hardware deep dive

This page assumes nothing. If the parent note used a symbol, we build it here, picture first. Read top to bottom — each item is the ladder rung for the next.

1. Voltage — the "height" every other symbol is measured against

Picture: a tank of water. The water level is the voltage. Ground is the empty floor.
Why the topic needs it: in pass-transistor logic we constantly ask "how high did the output node fill up?" That is a voltage question. Look at Figure s01 — the whole story is one tank filling and one tank draining.

2. $V_{D D}$ and GND — the two rails, our '1' and '0'

Picture: two horizontal shelves. Everything the circuit does is move a node's level toward the top shelf (a '1') or the bottom shelf (a '0'). See the shelves in Figure s01.
Why the topic needs it: the entire drama of PTL is the sentence "nMOS cannot lift a node all the way to the top shelf." You cannot even state that without $V_{D D}$ .

3. The MOSFET — a switch with FOUR terminals

Picture: a valve in a pipe (Figure s02). The pipe carries the signal (source ↔ drain). The gate is the lever that opens or shuts the valve. The body is the whole table the valve is bolted to — usually held at a fixed reference (for an nMOS, tied to GND).
Why the topic needs it: in ordinary logic the gate is driven by data. In pass-transistor logic the data flows through source→drain, and the gate merely steers. That reversal of roles is the definition of a pass transistor — so we must first know which terminal is which. And we introduce the body now because Section 7's body-effect formula compares the source against it; a symbol we'll never use unlabelled.

4. nMOS vs pMOS — two flavours of switch

Picture: two valves. The nMOS valve opens when you push its lever up; the pMOS valve opens when you push its lever down.
Why the topic needs it: the parent's headline result — nMOS = strong 0, weak 1; pMOS = strong 1, weak 0 — is a comparison of these two. We need both defined before that sentence means anything. And the fix (the Transmission Gate) literally glues one of each together.

5. $V_{GS}$ — the voltage difference that decides ON/OFF

This is the single most important symbol on the page.

Picture (Figure s03): two water levels — one at the gate, one at the source — and $V_{GS}$ is the gap between them. What matters is not how high the gate is, but how far it sits above the source.
Why this quantity and not just $V_{G}$ ? A transistor is built symmetrically around its channel; physically it can only "feel" the difference between its control (gate) and its reference (source). If you raise the gate AND the source together, the switch feels no change. So the honest control variable is the difference $V_{GS}$ , never the gate alone.

6. $V_{t n}$ — the threshold, the minimum gap to open the valve

Picture (Figure s04): the valve has a stiff spring. You must push the lever at least $V_{t n}$ above the source before it cracks open — the red dashed line marks the ceiling $V_{D D} - V_{t n}$ where the gap has shrunk to exactly $V_{t n}$ and the valve slams shut.
Why the topic needs it: rearrange the ON condition to $V_{S} < V_{G} - V_{t n}$ . With the gate pinned at $V_{D D}$ , the source (output) can only be lifted up to $V_{D D} - V_{t n}$ before the gap closes to exactly $V_{t n}$ and the valve slams shut. That $V_{D D} - V_{t n}$ ceiling is the weak '1'. Every symbol above was assembled to make this line readable.

7. Body effect ( $V_{t n 0}$ , $γ$ , $V_{S B}$ , $ϕ_{F}$ ) — the threshold isn't even constant

Now the body terminal from Section 3 earns its keep.

Picture: the valve's spring gets stiffer the higher the source rises above the body. So the ceiling $V_{D D} - V_{t n}$ drops further, because $V_{t n}$ itself grew.
Why the topic needs it: it makes the weak '1' even weaker than the simple $V_{D D} - V_{t n 0}$ estimate. Full detail lives in Threshold Voltage & Body Effect; here you only need to know which direction it hurts (worse). When $V_{S B} = 0$ the bracket is zero and $V_{t n} = V_{t n 0}$ — the degenerate baseline case.

8. Boolean symbols — describing what the circuit computes

Picture: switches wired in a route. $S \cdot A$ = "the $A$ -signal gets through only when $S$ is high."
Why the topic needs it: the MUX identity $Y = S \cdot A + \overset{ˉ}{S} \cdot B$ is the reading map for the whole circuit — "when $S$ is high send $A$ , else send $B$ ." See Multiplexers.

Prerequisite map

Equipment checklist

Self-test — cover the right side, answer, then reveal.

What does a voltage measure, physically?

Electrical "height" of a wire compared to ground (

0

V).

What are

V_{D D}

and GND, and which logic values do they mean?

Top rail (near it = '1') and bottom rail

0

V (near it = '0').

Name the four terminals of a MOSFET and their roles in PTL.

Gate = steering control; source & drain = the two ends of the switched signal path; body = the silicon slab it's built into (nMOS: tied to GND).

For an nMOS, which terminal do we label "source"?

The lower-voltage of the two source/drain ends.

When is an nMOS ON, and when a pMOS?

nMOS ON when gate is high; pMOS ON when gate is low.

Write

V_{GS}

in words and symbols.

Gate-to-source voltage,

V_{GS} = V_{G} - V_{S}

— the gap between gate and source levels.

Write the pMOS mirror quantity

V_{S G}

Source-to-gate voltage,

V_{S G} = V_{S} - V_{G}

(subtraction reversed, since pMOS turns on when gate is below source).

Why does

V_{GS}

(not

V_{G}

alone) decide conduction?

The device physically feels only the difference between control and reference; raising both together changes nothing.

What is

V_{t n}

and the exact nMOS ON condition?

Minimum gate-source gap to conduct; ON when

V_{GS} > V_{t n}

Derive the highest '1' an nMOS can pass with gate at

V_{D D}

V_{S} < V_{G} - V_{t n} = V_{D D} - V_{t n}

, so ceiling

= V_{D D} - V_{t n}

What is

V_{S B}

and what do

γ

and

ϕ_{F}

mean?

Source-to-body voltage

V_{S} - V_{B}

;

γ

= body-effect coefficient (how fast

V_{t n}

climbs),

ϕ_{F}

= Fermi potential (a doping-set baseline offset).

Which direction does body effect move

V_{t n}

when the output rises?

Upward (worse) — since

V_{S B} = V_{o u t}

grows, making the weak '1' even lower.

Read the symbols in

Y = S \cdot A + \overset{ˉ}{S} \cdot B

When

S = 1

pass

A

; when

S = 0

pass

B

(

\cdot

=AND,

+

=OR, bar=NOT).

Connections

Pass-transistor logic — the topic these foundations feed
CMOS Inverter — the simplest circuit that reuses these same symbols
Static CMOS Logic — contrast: gate driven by data, not the source/drain
Transmission Gate — where nMOS + pMOS are glued to beat the weak '1'
Threshold Voltage & Body Effect — the full story of $V_{t n}$ and $γ$
Multiplexers — the Boolean function these symbols describe
Dynamic Power vs Static Leakage — why a weak '1' costs power