A CMOS inverter is two switches stacked between a battery and ground, one flipping ON as the other flips OFF. The Voltage transfer characteristic (VTC) is just the picture of what the middle wire's voltage does as you slowly slide the input from LOW to HIGH — and everything about clean digital logic hides in how sharply that middle wire snaps from HIGH to LOW.
Before you can read that picture, you must own every letter in it. This page builds each symbol from nothing — plain words, a picture, and the reason the topic can't live without it. Read top to bottom; each block earns the next.
Voltage V is electrical push measured in volts (V). It always lives between two points — how hard electricity is being shoved from one spot to another. A single point has a voltage only once we pick a reference point called ground and call it 0 .
Picture a water tank on a hill. The height of the water is like voltage: water at the top has a big height (big push), water at the bottom (ground) has height zero. Wire = pipe. Voltage difference = height difference = what makes water (current) want to flow.
We need voltage because the VTC's two axes are both voltages : input push in, output push out.
Current I is the rate of flow of electric charge — how much water passes per second — measured in amperes (A). An arrow shows which way we chose to call "positive flow".
Kirchhoff's Current Law (KCL): at any junction (node), the water flowing in equals the water flowing out . Nothing piles up. If a node connects only two wires in a line, the same current flows through both.
In our inverter, the output wire connects to the top switch and the bottom switch and (in the DC picture) nothing else. Water can only travel through both switches, top to bottom. In a line → same current. That single sentence is the whole engine of the VTC: I D N = I D P .
The parent note writes I D N = I D P . Now you know why: it is KCL on a two-switch column.
A MOSFET (the switch) has three important wires. Their initials become subscripts everywhere:
Gate (G): the control knob. Voltage here decides if the switch is open or shut. No water flows into the gate — it just listens .
Source (S): where the charge carriers come from .
Drain (D): where they flow to .
So I D = drain current = the water actually flowing through the channel. The extra letter says which transistor: I D N = drain current of the N MOS, I D P = drain current of the P MOS.
A two-letter voltage is a difference between two legs .
V GS = V G − V S ( gate minus source, the "how hard is the knob pushed" )
V D S = V D − V S ( drain minus source, the voltage across the channel )
"V GS is just the gate's voltage."
Why it feels right: the letter G is first, so people read only "gate".
The fix: it is a difference . The source is the anchor. For the NMOS whose source sits at ground, V GS = V in − 0 = V in . For the PMOS whose source sits at V D D , we flip to V S G = V D D − V in so the number stays positive.
This is exactly why the parent writes V GS n = V in but V S Gp = V D D − V in — same idea, mirror-imaged because the PMOS hangs upside down.
V D D : the supply rail, the top of the tank — the highest voltage available (e.g. 1.8 V). "HIGH" / logic 1.
GND (ground, 0 V): the bottom, our reference. "LOW" / logic 0.
V in : the input push we control — the lever we slide from 0 to V D D .
V o u t : the middle wire — what we read out. The VTC is V o u t on the vertical axis vs V in on the horizontal axis .
The two transistors are stacked between V D D (top, PMOS) and GND (bottom, NMOS); their meeting point is V o u t . See CMOS Inverter for the full circuit.
Threshold voltage V T n (NMOS) is the minimum gate-push before the switch even starts to conduct. Below it: OFF (no channel). Above it: a conducting channel appears.
NMOS turns on when V GS > V T n (with V T n > 0 , e.g. 0.4 V).
PMOS turns on when V S G > ∣ V T p ∣ . Its own V T p is negative, so we use the magnitude ∣ V T p ∣ to keep comparisons clean.
Think of a garden tap that does nothing for the first quarter-turn — that dead zone is the threshold. Only past it does water start. V T n is where the NMOS wakes up , V D D − ∣ V T p ∣ is where the PMOS falls asleep . Those two points bracket the whole switching action.
Every MOSFET is always in exactly one of three states. The parent's 5-region table is just bookkeeping of which mood each transistor is in.
Cutoff: knob below threshold (V GS < V T n ). Switch fully OFF, I D ≈ 0 . Picture: closed tap.
Triode (a.k.a. linear/ohmic): ON and the drain–source voltage is small (V D S < V GS − V T n ). Acts like a resistor — flow grows as you raise V D S . Picture: open tap, gentle flow that responds to slope.
Saturation: ON but V D S is large (V D S > V GS − V T n ). Flow flattens — the transistor behaves like a current source , pushing a fixed current no matter the voltage across it. Picture: waterfall — once tall enough, more height doesn't add flow.
The quantity V GS − V T n — how far past threshold you are — is called the overdrive . It is the referee that decides triode vs saturation. Full current curves live in MOSFET IV Characteristics .
WHY does the topic care? In the steep middle of the VTC (region C) both transistors sit in saturation = both are current sources. Two current sources fighting means V o u t must swing violently to keep their currents equal — that is the near-vertical snap that makes digital logic possible.
Decode every symbol:
k n ′ (process transconductance , units A/V²): a fixed number set by the fabrication — how much current you get per unit overdrive². Electrons (NMOS) move faster than holes (PMOS), so k n ′ > k p ′ .
W (width), L (length): the physical size of the channel you draw. Wide + short = fat pipe = more current. The ratio W / L is the designer's main knob.
( V GS − V T n ) : the overdrive from §6 — how hard past turn-on. Squared, so pushing the knob harder helps a lot .
WHY squared and not linear? As you raise the gate, you do two things at once: you pull in more charge carriers and you push them harder . Two effects multiply → the product grows like (overdrive)². The square is not arbitrary; it is two linear helps stacked.
Writing k ′ L W every time is clumsy, so we bundle it:
β = k ′ L W = the total strength (gain factor) of one transistor. Bigger β = stronger pull.
r = β n β p = the strength ratio of PMOS to NMOS, square-rooted.
WHY the square root? In the V M derivation both currents are perfect squares (the square law). To set them equal we take the square root of both sides — that pulls a β p / β n out front, which we name r . So r is born from the square, and it linearizes the algebra: V M comes out as a clean weighted average instead of a quadratic. r = 1 means "equally matched fighters"; r > 1 means PMOS wins and drags V M upward.
The derivative d V in d V o u t is the slope of the VTC curve — how many volts the output moves for each volt the input moves, right at a point.
WHY a derivative and not just "the curve looks steep"? We need a precise boundary between "this gate cleans up noise" and "this gate makes noise worse". The exact line is slope = − 1 : output wiggle equals input wiggle. Steeper than that (∣ slope ∣ > 1 ) → output wiggle smaller → noise shrinks → clean logic. The derivative turns "looks steep" into an exact test. The two points where slope = − 1 are V I L and V I H , and they set the Noise Margins .
"Slope = + 1 marks the noise-margin points."
Why it feels right: people remember "gain 1".
The fix: an inverter flips the signal, so its slope is negative . You want d V in d V o u t = − 1 . Searching for + 1 finds nothing on the falling curve.
Two-letter voltages VGS VDS
Threshold VT and overdrive
Strength beta and ratio r
Voltage Transfer Characteristic
Recall Are you ready? (reveal each)
Voltage is always measured between which two things? ::: Two points — one being the chosen ground/reference.
State KCL for two wires in a line. ::: The same current flows through both; nothing accumulates at the node.
What does the subscript pair mean in V GS ? ::: A difference: V G − V S (gate minus source), not the gate alone.
Why is the PMOS written with V S G = V D D − V in ? ::: Its source sits at V D D ; flipping the letters keeps the drive voltage positive.
Which four wires define the inverter, and which two are the VTC axes? ::: V D D , GND, V in , V o u t ; axes are V in (x) and V o u t (y).
What is threshold voltage in one phrase? ::: The minimum gate-drive before the switch begins to conduct.
Name the three transistor moods and their one-word pictures. ::: Cutoff (closed tap), Triode (resistor), Saturation (current source / waterfall).
What decides triode vs saturation? ::: Compare V D S to the overdrive V GS − V T : smaller → triode, larger → saturation.
Why is saturation current squared in overdrive? ::: More carriers AND harder push — two linear effects multiply.
What is β and what is r ? ::: β = k ′ L W (transistor strength); r = β p / β n (PMOS-to-NMOS strength ratio).
Why does r carry a square root? ::: Setting two square-law currents equal requires square-rooting both sides.
What exact slope marks the noise-margin points, and what sign? ::: d V in d V o u t = − 1 (magnitude 1, negative because the inverter flips).