Logic gates — physical gate symbols, transistor implementation idea
1. What is a logic gate?
WHAT are 0 and 1 physically?
0= LOW voltage (near , "ground").1= HIGH voltage (near the supply , e.g. ).
We don't measure exact voltages — we use thresholds (below some level = 0, above some level = 1). This is why digital logic is robust to noise: a little wobble in voltage still reads as the same bit.
2. The transistor: the underlying switch
Two flavours used together (this pairing is called CMOS):
| Type | Conducts (closes) when gate is | Good at passing |
|---|---|---|
| NMOS | HIGH (1) | a strong 0 (pulls output down) |
| PMOS | LOW (0) | a strong 1 (pulls output up) |
3. Building gates from transistors (derive, don't memorize)
3.1 The inverter (NOT gate) — first principles
Goal: output should be the opposite of the input.
Reason it out:
- If input (HIGH): we want output . So we need a path from output to ground. The NMOS conducts when its gate is HIGH → connect NMOS so input drives its gate. ✔ It pulls output to 0.
- If input (LOW): we want output . We need a path from output to . The PMOS conducts when its gate is LOW → same input on its gate pulls output to 1. ✔
So: one PMOS to , one NMOS to ground, both gates tied to . That's a complete CMOS NOT gate with just 2 transistors.
3.2 NAND from transistors
Rule we want: output is 0 only when both inputs are 1.
- Pull-down (to ground) makes output 0 → needs both NMOS conducting → put two NMOS in series. Series = "AND" of conditions: both must be HIGH.
- Pull-up (to ) makes output 1 → needs either PMOS conducting → put two PMOS in parallel: if any input is LOW, output is pulled to 1.
Check: both inputs 1 → series NMOS conduct → out 0; parallel PMOS both off. Any input 0 → out 1. That is exactly NAND.
4. Gate symbols (the visual shorthand)
You must recognize these on sight. The small bubble (○) on an output always means "invert".

Truth tables (the source of truth)
| A | B | AND | OR | NAND | NOR | XOR | XNOR |
|---|---|---|---|---|---|---|---|
| 0 | 0 | 0 | 0 | 1 | 1 | 0 | 1 |
| 0 | 1 | 0 | 1 | 1 | 0 | 1 | 0 |
| 1 | 0 | 0 | 1 | 1 | 0 | 1 | 0 |
| 1 | 1 | 1 | 1 | 0 | 0 | 0 | 0 |
5. Worked examples
6. Common mistakes
Recall Feynman: explain to a 12-year-old
Imagine light switches wired in clever ways. A NOT is a switch that turns the light OFF when you flip it ON. An AND light only glows if you press both buttons. An OR light glows if you press any button. Inside a real chip these "buttons" are tiny electric switches called transistors — too small to see, with no moving parts; a little voltage tells each one to let electricity through or block it. Wire a few together and the chip can suddenly add numbers — that's the whole magic of computers: nothing but switches saying yes/no super fast.
Flashcards
What physically is a logical 1 vs 0?
1 = HIGH voltage (near ), 0 = LOW voltage (near ground); read via thresholds.What are a MOSFET's three terminals?
When does an NMOS conduct?
When does a PMOS conduct?
What does CMOS stand for / why used?
How many transistors in a CMOS inverter?
In the pull-down network, series transistors implement which operation?
In the pull-down network, parallel transistors implement which operation?
What does a bubble (○) on a gate output mean?
Why is NAND called universal?
Build a NOT from one NAND.
Truth table difference between OR and XOR?
Boolean expression for XOR?
What is called?
Connections
- Boolean Algebra — the math gates obey ().
- Binary Number System — what the 0s and 1s mean as numbers.
- Half Adder and Full Adder — gates combined to add bits.
- Transistors and MOSFETs — the device physics of the switch.
- CMOS Technology — pull-up/pull-down design in depth.
- Truth Tables and Karnaugh Maps — simplifying gate logic.
- How a CPU Works — millions of gates as an ALU + control.
Concept Map
Hinglish (regional understanding)
Intuition Hinglish mein samjho
Dekho, computer ke andar koi jaadu nahi hai — bas crore-crore chhote switch hain jinhe transistor kehte hain. Har transistor ke 3 point hote hain: gate, source, drain. Gate par voltage HIGH ya LOW karo, aur switch on/off ho jata hai — koi moving part nahi, sirf electric field ka khel. 1 matlab HIGH voltage, 0 matlab LOW voltage. Threshold se padhte hain, isliye thoda noise aaye to bhi bit galat nahi padhta.
In switches ko clever tarike se jodke logic gate banate hain. Sabse simple NOT gate: ek PMOS upar Vdd se, ek NMOS neeche ground se, dono ke gate par same input A. Jab A=0, PMOS conduct karta hai aur output 1 ho jata hai; jab A=1, NMOS conduct karta hai aur output 0. Bas 2 transistor mein input ka ulta mil gaya! Is PMOS-upar + NMOS-neeche jodi ko CMOS kehte hain, aur yahi har chip mein use hota hai kyunki power kam khaata hai.
Series mein transistor lagao to AND (sab on hone chahiye), parallel mein lagao to OR (koi bhi on ho jaye). Isi logic se NAND, NOR, XOR sab banate hain. Symbol yaad rakho: AND flat peeche, OR curved, aur bubble (○) ka matlab hamesha "ulta karo" (invert). Ek mast baat: sirf NAND se hi tum saari gates bana sakte ho — isliye usse "universal gate" kehte hain.
Kyun important hai? Kyunki tumhara C++/Python code last mein inhi gates par chalta hai. Numbers add karna, compare karna, memory mein store karna — sab in switches ke yes/no se hota hai, bas bahut tezi se. Gate samajh gaye, to computer ki neev samajh gaye.