Logic gates — physical gate symbols, transistor implementation idea

1.1.5 · Coding › How Computers Work

1. Logic gate kya hota hai?

0 aur 1 physically KYA hain?

0 = LOW voltage (near $0 V$ , "ground").
1 = HIGH voltage (supply $V_{dd}$ ke paas, e.g. $3.3 V$ ).

Hum exact voltages nahi measure karte — hum thresholds use karte hain (kisi level se neeche = 0, kisi level se upar = 1). Isliye digital logic noise ke against robust hai: voltage mein thodi si hilaavat bhi same bit ki tarah padhi jaati hai.

2. Transistor: underlying switch

Do flavours jo saath mein use hote hain (is pairing ko CMOS kehte hain):

Type	Conduct karta hai (close hota hai) jab gate hai	Achha hai pass karne mein
NMOS	HIGH (1)	ek strong 0 (output ko neeche pull karta hai)
PMOS	LOW (0)	ek strong 1 (output ko upar pull karta hai)

3. Transistors se gates banana (derive karo, memorize mat karo)

3.1 Inverter (NOT gate) — pehle principles se

Goal: output input ki opposite honi chahiye.

Socho:

Agar input $A = 1$ (HIGH): hum chahte hain output $= 0$ . Toh humein output se ground tak ek path chahiye. NMOS tab conduct karta hai jab uska gate HIGH ho → NMOS connect karo taaki input uska gate drive kare. ✔ Yeh output ko 0 pe pull karta hai.
Agar input $A = 0$ (LOW): hum chahte hain output $= 1$ . Humein output se $V_{dd}$ tak ek path chahiye. PMOS tab conduct karta hai jab uska gate LOW ho → same input $A$ uske gate pe output ko 1 pe pull karta hai. ✔

Toh: ek PMOS $V_{dd}$ tak, ek NMOS ground tak, dono gates $A$ se tied. Yeh sirf 2 transistors ke saath ek complete CMOS NOT gate hai.

3.2 NAND transistors se

Rule jo hum chahte hain: output 0 hoga tabhi jab dono inputs 1 hon.

Pull-down (ground tak) output ko 0 banata hai → dono NMOS ka conduct karna zaroori hai → do NMOS series mein rakho. Series = conditions ka "AND": dono HIGH hone chahiye.
Pull-up ( $V_{dd}$ tak) output ko 1 banata hai → kisi bhi PMOS ka conduct karna zaroori hai → do PMOS parallel mein rakho: agar koi bhi input LOW hai, output 1 pe pull hoti hai.

Check karo: dono inputs 1 → series NMOS conduct karte hain → out 0; parallel PMOS dono off. Koi bhi input 0 → out 1. Yeh exactly NAND hai.

4. Gate symbols (visual shorthand)

Tumhe inhe dekhte hi pehchanna chahiye. Output pe chota bubble (○) ka matlab hamesha "invert" hota hai.

Figure — Logic gates — physical gate symbols, transistor implementation idea

Truth tables (sach ka source)

A	B	AND	OR	NAND	NOR	XOR	XNOR
0	0	0	0	1	1	0	1
0	1	0	1	1	0	1	0
1	0	0	1	1	0	1	0
1	1	1	1	0	0	0	0

5. Worked examples

6. Common mistakes

Recall Feynman: 12 saal ke bachche ko explain karo

Sochon light switches clever tareekon se wired hain. Ek NOT ek aisa switch hai jo light ko OFF karta hai jab tum use ON karte ho. Ek AND light tabhi jalaati hai jab tum dono buttons press karo. Ek OR light tabhi jalaati hai jab tum koi bhi button press karo. Real chip ke andar yeh "buttons" transistors kahlane wale tiny electric switches hain — itne chhote ki dekh nahi sakte, koi moving parts nahi; ek choti si voltage har ek ko batati hai ki electricity ko aane do ya rok do. Kuch ko saath wire karo aur chip suddenly numbers add kar sakti hai — yahi computers ka poora magic hai: kuch nahi sirf switches bahut fast yes/no bolte hain.

Flashcards

Logical 1 vs 0 physically kya hai?

1 = HIGH voltage (near

V_{dd}

), 0 = LOW voltage (near ground); thresholds ke zariye padha jaata hai.

MOSFET ke teen terminals kya hain?

Gate (control), source, drain.

NMOS kab conduct karta hai?

Jab uska gate HIGH (1) ho; yeh output ko ground ki taraf pull karta hai (0 pass karne mein achha).

PMOS kab conduct karta hai?

Jab uska gate LOW (0) ho; yeh output ko

V_{dd}

ki taraf pull karta hai (1 pass karne mein achha).

CMOS ka full form kya hai / kyun use hota hai?

Complementary MOS: paired PMOS pull-up + NMOS pull-down; exactly ek conduct karta hai → low power, strong output.

CMOS inverter mein kitne transistors hote hain?

Do (ek PMOS

V_{dd}

tak, ek NMOS ground tak, gates input se tied).

Pull-down network mein series transistors kaunsa operation implement karte hain?

AND (sab ko conduct karna chahiye).

Pull-down network mein parallel transistors kaunsa operation implement karte hain?

OR (koi bhi ek conduct kare).

Gate output pe bubble (○) ka kya matlab hai?

Output ko invert karo (NOT).

NAND ko universal kyun kehte hain?

Koi bhi Boolean function sirf NAND gates use karke banaya ja sakta hai.

Ek NAND se NOT kaise banao?

NAND ke dono inputs ko same signal se tie karo:

\overline{A \cdot A} = \overline{A}

OR aur XOR ki truth table mein kya fark hai?

Woh ek jagah chhod ke agree karte hain,

A = B = 1

pe: OR=1, XOR=0. XOR = "exactly ek".

XOR ka Boolean expression kya hai?

A \oplus B = A \overset{ˉ}{B} + \overset{ˉ}{A} B

\overline{A \cdot B}

ko kya kehte hain?

NAND.

Connections

Boolean Algebra — woh math jise gates follow karte hain ( $+, \cdot,$ ).
Binary Number System — 0s aur 1s ka numbers ke roop mein matlab.
Half Adder and Full Adder — bits add karne ke liye combine kiye gaye gates.
Transistors and MOSFETs — switch ka device physics.
CMOS Technology — pull-up/pull-down design gehraai mein.
Truth Tables and Karnaugh Maps — gate logic simplify karna.
How a CPU Works — millions of gates as ALU + control.