Level 1 — RecognitionHow Computers Work

How Computers Work

⏱ 20 minutes30 marksprintable — key stays hidden on paper

Chapter: 1.1 How Computers Work Level: 1 — Recognition (MCQ, Matching, True/False with justification) Time Limit: 20 minutes Total Marks: 30

Section A — Multiple Choice (1 mark each, choose ONE)

Q1. What is the decimal value of the binary number $1011_2$ ?

(a) 9
(b) 11
(c) 13
(d) 15

Q2. The hexadecimal number $2F_{16}$ equals which decimal value?

(a) 31
(b) 45
(c) 47
(d) 63

Q3. How many bits are represented by a single hexadecimal digit?

(a) 2
(b) 3
(c) 4
(d) 8

Q4. The result of $1 \text{ XOR } 1$ is:

(a) 0
(b) 1
(c) undefined
(d) 2

Q5. A NAND gate produces output 0 only when:

(a) both inputs are 0
(b) both inputs are 1
(c) inputs differ
(d) never

Q6. A half adder outputs a sum and a carry. Which gate produces the SUM bit?

(a) AND
(b) OR
(c) XOR
(d) NOR

Q7. A device that selects one of several inputs based on select lines is a:

(a) decoder
(b) multiplexer
(c) flip-flop
(d) register

Q8. How many bits can an 8-bit register store?

(a) 1
(b) 4
(c) 8
(d) 256

Q9. Which memory type is the FASTEST but smallest in the memory hierarchy?

(a) HDD
(b) RAM
(c) L3 cache
(d) CPU registers

Q10. The part of the CPU that performs arithmetic and logic operations is the:

(a) Control Unit
(b) ALU
(c) Cache
(d) Register file

Q11. The correct order of the basic CPU cycle is:

(a) Decode → Fetch → Execute
(b) Fetch → Decode → Execute
(c) Execute → Fetch → Decode
(d) Fetch → Execute → Decode

Q12. Octal and hexadecimal are commonly used mainly because they:

(a) are faster for the CPU to compute
(b) compactly represent binary and map cleanly to bit groups
(c) use fewer transistors
(d) are the CPU's native number system

Section B — Matching (1 mark each; match Column X to Column Y)

Q13–Q17. Match each item in Column X to the correct description in Column Y.

#	Column X		Column Y
13	D flip-flop	A	Converts an N-bit input into one active output line of $2^N$
14	Decoder	B	Stores one bit; output follows input at the clock edge
15	Operating System	C	Human-readable form of machine code using mnemonics
16	Assembly language	D	Manages resources and provides an abstraction layer
17	Full adder	E	Adds three bits (two inputs + carry-in), gives sum and carry-out

Section C — True/False WITH Justification (2 marks each: 1 for T/F, 1 for reason)

Q18. " $FF_{16} = 255_{10}$ ." — True or False? Justify.

Q19. "An SR flip-flop with both inputs S=1 and R=1 is a valid, well-defined state." — True or False? Justify.

Q20. "NAND is a universal gate — any Boolean function can be built using only NAND gates." — True or False? Justify.

Q21. "There are exactly 16 possible truth tables for a two-input binary logic operation." — True or False? Justify.

Q22. "RAM retains its contents after the computer is switched off." — True or False? Justify.

Q23. "In binary counting, the number after $0111_2$ is $1000_2$ ." — True or False? Justify.

End of Paper

Answer keyMark scheme & solutions

Section A (12 marks)

Q1 — (b) 11. $1011_2 = 8+0+2+1 = 11$ . [1]

Q2 — (c) 47. $2F_{16} = 2\times16 + 15 = 32+15 = 47$ . [1]

Q3 — (c) 4. One hex digit ranges 0–15, needing $2^4$ values = 4 bits. [1]

Q4 — (a) 0. XOR outputs 1 only when inputs differ; identical inputs give 0. [1]

Q5 — (b) both inputs are 1. NAND = NOT(AND); AND is 1 only when both are 1, so NAND is 0 only then. [1]

Q6 — (c) XOR. Sum bit $= A \oplus B$ ; carry $= A \cdot B$ . [1]

Q7 — (b) multiplexer. A MUX routes one of many data inputs to output via select lines. [1]

Q8 — (c) 8. An N-bit register = N flip-flops storing N bits. [1]

Q9 — (d) CPU registers. Fastest, smallest; hierarchy: registers > cache > RAM > SSD > HDD. [1]

Q10 — (b) ALU. Arithmetic Logic Unit does arithmetic/logic; Control Unit directs. [1]

Q11 — (b) Fetch → Decode → Execute. Standard instruction cycle order. [1]

Q12 — (b) compactly represent binary and map cleanly to bit groups. 1 hex digit = 4 bits, 1 octal digit = 3 bits. [1]

Q13 → B (D flip-flop stores one bit, output follows input at clock edge). [1] Q14 → A (Decoder: N-bit input → one of $2^N$ active lines). [1] Q15 → D (OS: resource manager + abstraction layer). [1] Q16 → C (Assembly: human-readable mnemonics for machine code). [1] Q17 → E (Full adder adds three bits). [1]

Section C (12 marks)

Q18 — TRUE [1]. Justification: $FF_{16} = 15\times16 + 15 = 240+15 = 255$ , the max 8-bit value. [1]

Q19 — FALSE [1]. Justification: S=1, R=1 is the forbidden/invalid input for an SR (NOR-based) flip-flop — it forces both outputs to the same value, breaking the complementary Q/Q̄ requirement, and the next state is indeterminate. [1]

Q20 — TRUE [1]. Justification: NAND is functionally complete — NOT, AND, OR (hence all functions) can be constructed from NAND alone (e.g. NOT = NAND with tied inputs). [1]

Q21 — TRUE [1]. Justification: Two inputs give $2^2 = 4$ input rows; each row's output is 0 or 1, so $2^4 = 16$ distinct truth tables/operations. [1]

Q22 — FALSE [1]. Justification: RAM is volatile — it loses contents when power is removed. Non-volatile storage (SSD/HDD) retains data. [1]

Q23 — TRUE [1]. Justification: $0111_2 = 7$ ; adding 1 gives $8 = 1000_2$ (carry ripples through the ones). [1]

[
  {"claim": "1011 binary = 11 decimal", "code": "result = (int('1011',2) == 11)"},
  {"claim": "2F hex = 47 decimal", "code": "result = (int('2F',16) == 47)"},
  {"claim": "FF hex = 255 decimal", "code": "result = (int('FF',16) == 255)"},
  {"claim": "Two-input binary operations count is 16", "code": "result = (2**(2**2) == 16)"},
  {"claim": "0111 binary + 1 = 1000 binary (8)", "code": "result = (int('0111',2)+1 == int('1000',2) == 8)"},
  {"claim": "XOR of equal bits is 0, differing bits is 1", "code": "result = ((1 ^ 1)==0 and (1 ^ 0)==1)"}
]

Section A — Multiple Choice (1 mark each, choose ONE)

Section B — Matching (1 mark each; match Column X to Column Y)

Section C — True/False WITH Justification (2 marks each: 1 for T/F, 1 for reason)

Section A (12 marks)

Section B (5 marks)

Section C (12 marks)