How Computers Work

Question 1 (12 marks)

(a) $\text{0x}B6$: $B=11$, $6=6$, so $11\times16 + 6 = 176+6 = 182$ decimal. Binary: $B=1011$, $6=0110$ → $10110110$. Marks: decimal 182 (1), correct method (1), binary $10110110$ (1).

(b) Counting up from 101110 (=46): next four are 101111 (47), 110000 (48), 110001 (49), 110010 (50). Marks: 1 for first two correct, 1 for handling the carry into 110000, 1 for last two.

(c) $\text{0x}B6 = 182 = 266_8$ (since $2\times64 + 6\times8 + 6 = 128+48+6=182$). Octal 266 uses 3 digits vs hex B6 uses 2 digits — the claim is wrong; hex is more compact here. Hex is standard because one hex digit maps to exactly 4 bits, so a byte (8 bits) is always exactly 2 hex digits; octal groups in 3s which does not divide 8 evenly. Marks: octal 266 (2), claim rejected (1), 4-bit grouping reason (1).

(d) $\text{0x}B6 = 10110110$, $\text{0x}4A = 01001010$. XOR = $11111100 = \text{0x}FC$. Marks: correct XOR bits (1), hex FC (1).

Question 2 (13 marks)

(a) $F = G \cdot (A + B) \cdot \overline{E}$. Marks: AND of G (1), OR of A,B (1), NOT E factor (1).

(b) With $G=1$, $F = (A+B)\cdot\overline{E}$:

Marks: correct E=1 rows all 0 (2), correct A+B logic when E=0 (2).

(c) NOT: tie both inputs of a NAND together → $\overline{X\cdot X}=\overline{X}$. 1 NAND. AND: NAND then NOT → $\overline{\overline{A\cdot B}} = A\cdot B$; the NOT is itself a NAND, so 2 NANDs. Marks: NOT construction (1), AND construction (1), gate counts (1).

(d) XOR outputs 1 exactly when inputs differ. In an adder it computes the Sum bit (and half-adder sum). Marks: XOR named (1), "differ" justification (1), adder sum use (1).

Question 3 (12 marks)

(a) $S = A \oplus B \oplus C_{in}$; $C_{out} = (A\cdot B) + (C_{in}\cdot(A\oplus B))$. Marks: S (1), Cout main term (1), Cout carry-propagate term (1).

(b) $1011 + 0110$:

• col0: 1+0=1, carry 0
• col1: 1+1=0, carry 1
• col2: 0+1+1(carry)=0, carry 1
• col3: 1+0+1(carry)=0, carry 1 Result: $10001_2$ (= 17 decimal; $11+6=17$ ✓). Marks: carries shown (1), result bits (1), 5-bit answer 10001 (1).

(c) $Y = \overline{S}\cdot D_0 + S\cdot D_1$. A 4-to-1 mux needs 2 select lines ($2^2=4$). Marks: expression (2), 2 select lines (1).

(d) Each clock edge inverts $Q$ (since $D=\overline{Q}$), so $Q$ toggles $0,1,0,1,\dots$. Output frequency is half the clock frequency — this is a frequency divider / toggle (T) flip-flop / 1-bit counter. Marks: toggling described (1), half-frequency noted (1), named (1).

Question 4 (14 marks)

(a) ALU — performs arithmetic/logic operations; Control Unit — fetches/decodes instructions and directs data flow; Registers — small fast storage for operands/results. Marks: 1 each.

(b) Fastest→slowest: CPU register → L1 cache → L3 cache → RAM → SSD → HDD. Trade-off: faster memory (closer to CPU, using more transistors per bit / more expensive tech) costs more per bit and generates more heat, so only small amounts are affordable; large capacity requires cheaper, slower technology — hence a hierarchy balancing speed vs. size/cost. Marks: correct order (2), trade-off explanation (2).

(c) Fetch — read instruction from memory using PC → involves Control Unit + memory/cache. Decode — interpret the instruction bits → Control Unit. Execute — perform the operation (e.g. compute) → ALU (and registers for operands/result). Marks: 1 per phase with component.

(d) Number of values = $2^{n}$ where $n$ = number of flip-flops (bits), since each stores one independent bit. For 8: $2^8 = 256$ values. Marks: $2^n$ reasoning (1), 256 (1).

(e) The operating system (with the memory-management unit) provides an abstraction: it maps program variables to physical addresses and manages memory, so the programmer works with names/logical addresses. Component: operating system / memory manager. Marks: abstraction idea (1), OS named (1).

Question 5 (9 marks)

(a) $110 + 101 = 1011_2$ (= 6+5 = 11). But R1 is 3 bits, so only the low 3 bits 011 (=3) are stored; the carry-out bit (the 4th bit) is lost — this is overflow. Marks: full sum 1011 (1), stored value 011 (1), overflow/lost bit (1).

(b) Assembly is a human-readable mnemonic form (e.g. ADD R1,R2); an assembler translates it one-to-one into machine code — the binary instruction pattern the CPU decodes. The CPU hardware only reads binary opcodes, so machine code is what physically executes. Marks: assembly↔machine mapping (1), assembler translation (1), CPU runs binary (1).

(c) The carry (or overflow) flag should be set. Software can detect that a result exceeded 3 bits and handle it — e.g. raise an error, use multi-word arithmetic, or saturate the value. Marks: carry/overflow flag named (1), correct meaning (1), software use (1).

[
{"claim":"0xB6 = 182 decimal","code":"result = (int('B6',16)==182)"},
{"claim":"0xB6 in octal is 266","code":"result = (oct(int('B6',16))[2:]=='266')"},
{"claim":"0xB6 XOR 0x4A = 0xFC","code":"result = (int('B6',16)^int('4A',16)==int('FC',16))"},
{"claim":"1011b + 0110b = 10001b (17)","code":"result = (int('1011',2)+int('0110',2)==int('10001',2)==17)"},
{"claim":"8 flip-flops hold 256 values","code":"result = (2**8==256)"},
{"claim":"110b+101b=1011b, low 3 bits =011b=3, overflow lost","code":"s=int('110',2)+int('101',2); result = (s==11 and (s & 0b111)==3 and (s>>3)==1)"}
]