Level 3 — ProductionHow Computers Work

How Computers Work

45 minutes60 marksprintable — key stays hidden on paper

Level: 3 — Production (from-scratch derivations, code-from-memory, explain-out-loud) Time limit: 45 minutes Total marks: 60

Instructions: Show all working. For "explain-out-loud" prompts, write your explanation as if teaching a peer. Use ...... for math where helpful.


Question 1 — Number systems from scratch (10 marks)

(a) Convert the decimal number 217217 to binary and to hexadecimal, showing your division/remainder working. (4)

(b) Convert the hexadecimal number 0x2F\text{0x2F} to decimal and to octal. (3)

(c) Explain out loud, in 2–3 sentences, why programmers use hexadecimal instead of writing raw binary. Reference the bit-grouping relationship. (3)


Question 2 — Boolean algebra & truth tables (10 marks)

(a) Build the full truth table for F=(AB)CF = (A \oplus B) \cdot \overline{C} (XOR then AND with NOT C). (4)

(b) Prove, using a truth table, that NAND is functionally complete by expressing NOT, AND, and OR using only NAND gates. Give the gate-level expression for each. (6)


Question 3 — Combinational logic from memory (12 marks)

(a) Derive the full adder from scratch. State the two Boolean equations for Sum and Carry-out in terms of inputs AA, BB, CinC_{in}, and give the complete truth table (8 rows). (6)

(b) Explain out loud how a full adder is built from two half adders and one OR gate. Name what each half adder computes. (3)

(c) A 2-to-1 multiplexer has inputs I0I_0, I1I_1 and select line SS. Write its Boolean output equation and explain in one sentence what a MUX does. (3)


Question 4 — Sequential logic & storage (10 marks)

(a) Draw/describe the SR latch made from two cross-coupled NOR gates. State what happens for the input combinations (S,R)=(0,0),(1,0),(0,1),(1,1)(S,R) = (0,0), (1,0), (0,1), (1,1) and identify the forbidden state. (5)

(b) Explain out loud the difference between a D flip-flop and a JK flip-flop, and why a register of NN bits needs NN flip-flops. (3)

(c) How many distinct values can an 8-bit register store, and what is the largest unsigned value? (2)


Question 5 — CPU & the fetch-decode-execute cycle (10 marks)

(a) List, in order, the steps of one fetch-decode-execute cycle. For each step name which CPU component(s) are primarily involved (ALU, control unit, registers, PC, memory). (6)

(b) Explain out loud the difference between machine code and assembly language, and why both exist. (4)


Question 6 — Memory hierarchy & OS (8 marks)

(a) Rank these from fastest to slowest and briefly note the speed/size trade-off: registers, L1 cache, RAM, SSD, HDD. (5)

(b) Explain out loud two distinct roles the operating system plays. (3)


Answer keyMark scheme & solutions

Question 1 (10 marks)

(a) 217217 to binary — repeated division by 2: 217/2=108217/2=108 r11; 108/2=54108/2=54 r00; 54/2=2754/2=27 r00; 27/2=1327/2=13 r11; 13/2=613/2=6 r11; 6/2=36/2=3 r00; 3/2=13/2=1 r11; 1/2=01/2=0 r11. Reading remainders bottom-up: 110110012\mathbf{11011001_2}. (2) To hex: group binary in nibbles 1101 1001=D9=0xD91101\ 1001 = \text{D}\,9 = \mathbf{0xD9}. (Check: 1316+9=208+9=21713\cdot16+9=208+9=217.) (2) Why: remainders give binary digits least-significant first; nibble grouping gives hex directly.

(b) 0x2F=216+15=32+15=47\text{0x2F} = 2\cdot16 + 15 = 32+15 = \mathbf{47}. (2) To octal: 47=32+15=057847 = 32+15 = 057_8 (since 47/8=547/8=5 r77) → 578\mathbf{57_8}. (1)

(c) Hex is used because one hex digit maps exactly to 4 binary bits (16=2416=2^4), so a byte is just two hex digits. It is far more compact and less error-prone to read than long binary strings, while still directly reflecting bit patterns (unlike decimal). (3: mapping 1, compactness 1, bit-faithfulness 1)


Question 2 (10 marks)

(a) Truth table for F=(AB)CF=(A\oplus B)\cdot\overline C: (4: 1 per correct half of table)

A B C A⊕B ¬C F
0 0 0 0 1 0
0 0 1 0 0 0
0 1 0 1 1 1
0 1 1 1 0 0
1 0 0 1 1 1
1 0 1 1 0 0
1 1 0 0 1 0
1 1 1 0 0 0

F=1F=1 only for rows (0,1,0)(0,1,0) and (1,0,0)(1,0,0).

(b) NAND completeness: (2 each)

  • NOT: A=A NAND A\overline{A} = A \text{ NAND } A.
  • AND: AB=(A NAND B)=(A NAND B) NAND (A NAND B)A\cdot B = \overline{(A\text{ NAND }B)} = (A\text{ NAND }B)\text{ NAND }(A\text{ NAND }B).
  • OR: A+B=A NAND B=(A NAND A) NAND (B NAND B)A+B = \overline{A}\text{ NAND }\overline{B} = (A\text{ NAND }A)\text{ NAND }(B\text{ NAND }B) (by De Morgan).

Verification: NOT via A=AA\overline{A}=\overline{A\cdot A}; OR since AˉBˉ=A+B\overline{\bar A\cdot\bar B}=A+B.


Question 3 (12 marks)

(a) Full adder equations: (2) Sum=ABCin,Cout=AB+Cin(AB) (=AB+BCin+ACin).\text{Sum} = A\oplus B\oplus C_{in}, \qquad C_{out} = A\cdot B + C_{in}\cdot(A\oplus B)\ (=AB+BC_{in}+AC_{in}). Truth table: (4)

A B Cin Sum Cout
0 0 0 0 0
0 0 1 1 0
0 1 0 1 0
0 1 1 0 1
1 0 0 1 0
1 0 1 0 1
1 1 0 0 1
1 1 1 1 1

(b) First half adder adds AA and BB giving partial sum S1=ABS_1=A\oplus B and carry C1=ABC_1=A\cdot B. Second half adder adds S1S_1 and CinC_{in} giving final Sum =S1Cin=S_1\oplus C_{in} and carry C2=S1CinC_2=S_1\cdot C_{in}. The OR gate combines the two carries: Cout=C1+C2C_{out}=C_1+C_2. (3)

(c) Y=SI0+SI1Y = \overline{S}\cdot I_0 + S\cdot I_1. A multiplexer selects one of several data inputs to pass to the output based on the select line(s). (3)


Question 4 (10 marks)

(a) SR latch = two cross-coupled NOR gates; QQ and Q\overline Q feed back. (1)

  • (0,0)(0,0): Hold — retains previous state. (1)
  • (1,0)(1,0): SetQ=1Q=1. (1)
  • (0,1)(0,1): ResetQ=0Q=0. (1)
  • (1,1)(1,1): Forbidden/invalid — both outputs forced to 00, violating Q=QQ=\overline{\overline Q}; unstable on release. (1)

(b) A D flip-flop stores whatever is on its D input at the clock edge (no forbidden state). A JK flip-flop behaves like SR but (J,K)=(1,1)(J,K)=(1,1) toggles instead of being forbidden. A register holds NN independent bits, and each single-bit storage element (flip-flop) holds exactly one bit, so NN bits require NN flip-flops. (3)

(c) 28=2562^8 = \mathbf{256} distinct values; largest unsigned =281=255= 2^8-1 = \mathbf{255}. (2)


Question 5 (10 marks)

(a) (6: 1 per correct step+component)

  1. Fetch: control unit uses the PC to address memory, loads instruction into the instruction register; PC incremented.
  2. Decode: the control unit interprets the opcode/operands.
  3. Execute: the ALU performs arithmetic/logic (or a memory/register transfer occurs); operands come from registers.
  4. Results written back to registers/memory; cycle repeats with next PC value.

(b) Machine code is the raw binary opcodes the CPU executes directly. Assembly is a human-readable mnemonic representation (e.g. MOV, ADD) that maps essentially one-to-one to machine instructions and is translated by an assembler. Both exist because the hardware only understands binary, but humans need readable symbols to write/debug low-level code. (4)


Question 6 (8 marks)

(a) Fastest→slowest: registers → L1 cache → RAM → SSD → HDD. (3 for order) As you move down: latency increases and capacity/size increases while cost-per-bit falls — small+fast at the top, large+slow at the bottom. (2)

(b) Any two of: Resource manager (schedules CPU time, allocates memory, manages I/O among processes); Abstraction layer (hides hardware details behind system calls / file & process abstractions); also process/memory protection and security. (3)


[
  {"claim":"217 decimal = 0xD9 and binary 11011001","code":"result = (bin(217)=='0b11011001') and (hex(217)=='0xd9')"},
  {"claim":"0x2F = 47 decimal = 57 octal","code":"result = (0x2F==47) and (oct(47)=='0o57')"},
  {"claim":"8-bit register: 256 values, max 255","code":"result = (2**8==256) and (2**8-1==255)"},
  {"claim":"Full adder Cout majority function matches truth table","code":"from sympy.logic.boolalg import Xor\nA,B,C=symbols('A B C')\nCout=(A&B)|(C&Xor(A,B))\nrows={(a,b,c):int(bool(Cout.subs({A:a,B:b,C:c}))) for a in (0,1) for b in (0,1) for c in (0,1)}\nexpected={(0,0,0):0,(0,0,1):0,(0,1,0):0,(0,1,1):1,(1,0,0):0,(1,0,1):1,(1,1,0):1,(1,1,1):1}\nresult = rows==expected"}
]