Every RV32I instruction is exactly 32 bits (fixed length → trivial fetch/decode). The bits are chopped into fields. The genius is that fields stay in the same place across formats so the decoder can extract them in parallel.
How many GPRs, and what's special about x0? → 32; x0 is hardwired zero.
Instruction length in RV32I? → Fixed 32 bits.
Why split S/B immediates? → Keep rs1/rs2/rd fields in fixed positions for fast decode.
Difference RV32I vs RV64I? → XLEN (32 vs 64) + word (*w) and ld/sd instructions.
How do you load a full 32-bit constant? → lui (upper 20) + addi (lower 12), correcting for signed low.
Recall Feynman: explain to a 12-year-old
Imagine a chef with only 40 basic moves (chop, stir, pour…). That's the RISC-V base. Any dish (program) is just a long list of these moves. There are 32 numbered bowls (registers) to hold ingredients, and bowl #0 is magic: it's always empty (zero) — super handy as "nothing". Every recipe card is the same size so the chef reads them super fast. If you need a bigger kitchen, you add extra move-packs (multiply, floating point) — but the 40 basics never change. RV64 just uses bigger bowls that hold bigger numbers.
RISC-V ek open ISA hai — yaani hardware aur software ke beech ka contract, jise koi bhi bina license fee ke use kar sakta hai. Iska base integer set (RV32I ya RV64I) jaan-boojh ke bahut chhota rakha gaya hai: sirf ~40 basic instructions, jinse pura computer chal jaata hai. Baaki cheezein (multiply, floating point, atomics) extensions ki tarah add hoti hain — M, A, F, D, C jaise letters. Idea simple hai: hardware chhota aur fast rakho, compiler se kaam karwao. Yahi RISC philosophy hai.
Registers: dono me 32 general-purpose registers hote hain (x0 se x31). Sabse important trick — x0 hamesha zero hota hai. Isse nop, mv, zero-compare jaise kaam free me ho jaate hain, alag opcodes ki zaroorat nahi. RV32I me registers 32-bit ke hain (XLEN=32), RV64I me 64-bit (XLEN=64). Yaad rakho: "32" ka matlab register ki width hai, count nahi — count dono me 32 hi hai.
Har instruction fixed 32-bit ka hai, jisse fetch/decode bilkul aasaan ho jaata hai. 6 formats hain: R, I, S, B, U, J. Ek smart cheez — rs1, rs2, rd fields hamesha same jagah rehte hain, isliye immediate ke bits idhar-udhar bikhre hote hain (S/B/J me). Isse decoder register read jaldi shuru kar sakta hai. Immediate hamesha sign-extend hota hai, isliye negative numbers (jaise addi x5, x6, -1) automatically kaam karte hain. Bade constant load karne ke liye lui + addi combo use hota hai — bas dhyaan rakho ki low 12 bits signed hote hain, isliye kabhi upper part ko +1 karna padta hai. RV64I me addw, subw, ld, sd jaise extra instructions aate hain jo 64-bit kaam sambhaalte hain.
