Intuition The one core ideaA computer's brain (the CPU) understands only numbers made of bits , and an ISA is the fixed rulebook that says "this exact pattern of 32 bits means: add these two boxes and put the answer in that box." Everything in the parent note — registers, formats, immediates, sign-extension — is just different ways of slicing those 32 bits into meaningful chunks so the hardware knows what to do.
Before you can read a single line of the parent RISC-V base ISA (RV32I - RV64I) note, you need a toolbox. This page builds every tool from nothing. Each item: what it means in plain words, the picture it makes, and why the topic can't live without it.
A bit is a single box that can hold only one of two values: 0 or 1 . That's it. It is the smallest piece of information a computer can store.
Imagine a light switch. Off = 0, on = 1. A bit is one switch. Nothing in a computer is smaller than this. When we say "32 bits" we mean 32 switches in a row .
Why does the topic need this? Because every instruction in RV32I is literally "32 switches set to a specific pattern." The whole chapter is about what those switches mean.
Definition Bit-string and widthA bit-string is several bits written side by side, like 1011. Its width is how many bits it has. We read them like a written number: the leftmost bit is the "most significant" (biggest place value), the rightmost is the "least significant" (the ones place).
Think of the odometer in a car, but each wheel shows only 0 or 1. The wheel on the far right ticks the fastest (place value 1); each wheel to the left is worth double the one to its right.
So a 4-bit string like 1011 means, place by place:
1 ⋅ 8 + 0 ⋅ 4 + 1 ⋅ 2 + 1 ⋅ 1 = 11
A bit-string is all the parent's data ever is: a register holds one (its width is called XLEN, built in §7), and an instruction is a 32-wide one. Next we learn how to point at part of such a string.
[high:low] slice
When we write in s t [ 31 : 20 ] from the 32-bit string called inst, take the boxes numbered 31 down to 20 (12 boxes). Box numbers count from the right starting at 0, so box 31 is the far-left box and box 0 is the far-right box.
Lay out 32 numbered lockers in a row. in s t [ 31 : 20 ] contiguous chunk you pull out and read as its own smaller number.
Why the topic needs it: the six instruction formats (R, I, S, B, U, J) are nothing but named rules for which slice means opcode, which means rd, which means the constant baked into the instruction. Learn the slice notation and the formats become readable. (Those field names get their meanings and bit-widths in §10.)
Definition Hexadecimal (hex)Hex is a shorthand where every group of 4 bits becomes one symbol from 0–9 then A–F (A=10, B=11, C=12, D=13, E=14, F=15). We flag a hex number with the prefix 0x.
32 switches is exhausting to read. Group them into 8 packets of 4 , and give each packet a single label. 0xDEADBEEF is just 8 labels standing for 32 switches — same information, one-quarter the writing.
Worked example Reading one hex digit0xF = binary 1111 = 8 + 4 + 2 + 1 = 15 0xE = 1110 = 14 0xA = 1010 = 10 0xEEF = 1110 1110 1111 — twelve bits, three hex digits. This is the exact value in the parent's constant-loading example.
Why the topic needs it: the parent writes constants like 0xDEADBEEF and 0xEEF. Without hex you'd drown in 32-digit binary.
Definition Unsigned interpretationIf we treat a bit-string as unsigned , we just add up the place values — the answer is always ≥ 0 n [ 0 , 2 n − 1 ]
But computers must also represent negative numbers, and they only have 0s and 1s — no minus-sign switch. The trick is Two's Complement .
Definition Signed (two's complement), brieflyIn two's complement , the leftmost bit is the sign flag : if it is 1, the number is negative. To read a negative value, the shortcut is: the top bit's place value is counted as negative .
Take the 4-bit odometer again, but the far-left wheel is worth − 8 + 8 1111 reads as − 8 + 4 + 2 + 1 = − 1 1000 reads as − 8 + 0 = − 8 Two's Complement .
Intuition Where the "negative place value" comes from: invert-and-add-oneThe other everyday recipe for negating a number is: flip every bit, then add 1. Try it on 4-bit +1 = 0001: flip → 1110, add 1 → 1111, which we just read as − 1 n v ( 2 n − 1 ) − v v 2 n − v n 2 n 2 n − v exactly like − v why the top bit can be counted as − 2 n − 1
Why the topic needs it: the parent's whole "why 0xDEADC not 0xDEADB" argument only makes sense once you know 0xEEF (top bit set) is a negative number under two's complement.
Definition Sign-extensionSign-extending a narrow signed number to a wider width means copying its leftmost (sign) bit into all the new boxes on the left . The written value stays the same; only the width grows.
Definition The function notationsext(...)
The parent writes things like sext ( imm ) sext X L E N ( ⋯ ) sext ( x ) machine that takes a narrow signed bit-string x . The little subscript, as in sext 32 how wide the output should be (here 32 boxes). It is not multiplication or a variable — it is "apply the sign-extend operation." So sext 32 ( 1111 1111 1111 )
A positive number gets padded with 0s on the left (like writing 7 as 007). A negative number gets padded with 1s — because in two's complement those leading 1s are how "negative" is spelled at every width.
addi x1, x0, -1 gives all-ones
The 12-bit immediate for − 1 1111 1111 1111. Sign-extending to 32 bits copies the leading 1 leftward → 1111...1111 (all 32 ones) = 0xFFFFFFFF. Read as signed, that is still − 1 sext X L E N
Why the topic needs it: every immediate in RV32I is stored narrow (12 or 20 bits) and sign-extended to the register width XLEN (defined next). Miss this and half the worked examples break.
XLEN is just a name for the register width in bits . ==XLEN = 32 for RV32I, XLEN = 64 for RV64I.== The parent uses one symbol so it can write one rule that covers both machines.
Common mistake The two "32"s are unrelatedIn RV32I , the 32 is XLEN (register width ). The number of registers is always 32 in both RV32I and RV64I — a pure coincidence of the same number appearing. Register count ≠ register width .
A register is a fast storage box inside the CPU that holds one XLEN-bit value. The register file is the collection of them; RISC-V has 32, named x0–x31.
Think of 32 labelled cups on the chef's counter (the [!recall] chef analogy from the parent). Instructions move ingredients between cups. Cup x0 is glued empty — always reads 0, ignores anything poured in. That "always zero" cup is the trick behind mv, li, nop, and branch-if-zero.
Why the topic needs it: instructions name their inputs and output by register number (fields rs1, rs2, rd), so you must know what a register is before you can decode a format.
Definition Program counter (pc)The pcaddress of the current instruction — where in memory we are executing right now.
A finger pointing at one line of a recipe. Normally the finger slides down one instruction at a time; a branch or jump picks the finger up and drops it somewhere else. The parent's target = p c + sext ( imm ) sext pc.
Definition The named slices of an instruction
opcode — the slice that says what family of operation this is (add-family, load-family, branch-family…).funct3 / funct7 — extra slices that refine the opcode (which add-family op exactly).rd — "register d estination": the cup the answer goes into.rs1, rs2 — "register s ource 1 and 2": the cups holding the inputs.immediate (imm) — a constant number baked right into the instruction bits , not read from a register.
Intuition Why "immediate"?The value is available immediately from the instruction itself — no memory or register lookup needed. This connects to Addressing Modes : immediate addressing means "the operand is the number written in the instruction."
Why the topic needs it: these are the words on every format diagram in the parent. funct7 | rs2 | rs1 | funct3 | rd | opcode is just this vocabulary, laid out in bit order with the widths above.
The arrows below say "you must understand the box at the tail before the box at the head makes sense," and each edge label names what flows along it — so you can trace, e.g., how "powers of two" is the single idea that unlocks both hex and the signed range.
Place values powers of two
All roads drain into the parent RISC-V base ISA (RV32I - RV64I) . Related big-picture context lives in Instruction Set Architecture (ISA) , RISC vs CISC , Pipelining , and Assembler & Pseudo-instructions .
Try to answer each before revealing. If any stumps you, re-read that section above.
What is a bit, in one sentence? A single box holding one of two values, 0 or 1.
What is the place value of bit number i 2 i
How many distinct patterns can n 2 n
What does the slice in s t [ 31 : 20 ] The 12 bits from box 31 down to box 20 of the string inst.
Convert 0xE to 4 bits and to a decimal number. 1110, which is 14
In two's complement, which bit tells you the sign, and what does 1 mean there? The leftmost (most significant) bit; 1 means the number is negative.
Negate 4-bit 0001 by invert-and-add-one; what pattern and value do you get? Flip to 1110, add 1 → 1111, which is − 1
What is the signed range of a 12-bit two's-complement field? [ − 2048 , 2047 ]
What does sext 32 ( x ) Widens the narrow signed bit-string x
When you sign-extend a negative number to a wider width, what do you pad with? Copies of the sign bit, i.e. 1s (0s if the number is positive).
What does XLEN stand for, and its two values? The register width in bits; 32 for RV32I, 64 for RV64I.
How many registers does RISC-V have, and which one is special? 32 (x0–x31); x0 is hardwired to zero.
Why is the rd field exactly 5 bits wide? Because 2 5 = 32
How wide are opcode, funct3, funct7, and an I-type immediate? 7, 3, 7, and 12 bits respectively.
What does the pc hold? The address of the current instruction.
Which field is the destination register, and which are the sources? rd is destination; rs1, rs2 are the sources.