4.3.22Semiconductor Fabrication

Packaging and wire bonding - flip-chip

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WHAT is this? After a wafer is fabricated and diced into individual dies, each bare silicon die must be packaged: mechanically protected, electrically connected to the outside world, and given a path to shed heat. Wire bonding and flip-chip are the two dominant ways to make those electrical connections between the die's tiny on-chip pads and the package leads.


Why packaging exists at all


Method 1 — Wire Bonding

Two flavours:

  • Ball bonding (thermosonic): a spark melts the wire tip into a ball, pressed onto the pad ("first bond"), then a "stitch/wedge" seals the second end. Fast, common for Au/Cu.
  • Wedge bonding (ultrasonic): wire is dragged and pressed with no ball; used for Al, coarse pitch, RF/power.

The perimeter limit (WHY flip-chip was invented)


Method 2 — Flip-Chip

Figure — Packaging and wire bonding - flip-chip

Parasitics — the electrical reason flip-chip wins


Worked Examples


Common Mistakes


Active Recall

Recall Cover the answers — can you reconstruct them?
  • The four jobs of a package? → connect, protect, cool, fan-out.
  • Why does flip-chip scale quadratically? → area array vs 1-D perimeter.
  • The three energies of thermosonic bonding? → thermal, mechanical, ultrasonic.
  • Why underfill? → CTE mismatch stress relief.
  • Formula for wire-bond max I/O? → 4L/p4L/p.
Recall Feynman: explain to a 12-year-old

A computer chip is a tiny glass tile covered in invisible wiring, but it's too small and fragile to plug into anything. So we put it in a "house" (the package). To let electricity in and out, we either sew thin gold threads from the tile's edge to the house's legs (wire bonding) — but you can only sew around the edge, so not many threads fit. OR we cover the whole face of the tile with tiny solder blobs, flip it upside down, and press it down so every blob touches a pad (flip-chip). Because you use the whole face, not just the edge, you get way more connections — and the tiny blobs let electricity flow faster than long threads.


Connections

  • Wafer Dicing — produces the individual dies that get packaged.
  • Thermal Management and Heat Sinks — flip-chip's exposed back enables it.
  • Signal Integrity and Parasitic Inductance — the V=Ldi/dtV=L\,di/dt story.
  • Ball Grid Array (BGA) — a common second-level interconnect for flip-chip parts.
  • Coefficient of Thermal Expansion (CTE) Mismatch — why underfill exists.
  • Intermetallic Compounds and Bond Reliability — the metallurgy of the joint.

What are the four functions of an IC package?
Electrical connection, mechanical protection, heat removal, and fan-out (pitch translation from die to PCB).
In wire bonding, how does the die sit and where are the connections?
Face-up, glued by its back; connections only along the perimeter pads.
In flip-chip, how does the die sit?
Face-down, active surface toward the substrate, connected by an area array of solder bumps.
Max I/O for perimeter wire bonding?
N = 4L/p (linear in die side L).
Max I/O for area-array flip-chip?
N = (L/p)^2 (quadratic in die side L).
Above what die size does flip-chip beat wire bonding (same pitch)?
When L > 4p (solving (L/p)^2 > 4L/p).
What three energies form a thermosonic bond?
Thermal (heat), mechanical (force), and ultrasonic (vibration to remove oxide).
What does C4 stand for?
Controlled Collapse Chip Connection (the solder-bump flip-chip method).
Why is flip-chip electrically faster than wire bonding?
Short (~0.1 mm) bumps have far lower parasitic inductance/resistance than long (~1–3 mm) wires, reducing V = L·di/dt noise.
What is underfill and why is it needed?
Epoxy wicked between die and substrate; it redistributes stress from CTE mismatch, preventing solder-bump fatigue.
Ball bond vs wedge bond?
Ball = spark-formed ball + stitch, thermosonic, Au/Cu; wedge = no ball, ultrasonic pressing, used for Al/coarse pitch.
Why can't you just add more heat to make better wire bonds?
Excess heat oxidizes pads and forms brittle intermetallics (e.g. Au–Al 'purple plague') and warps the die.

Concept Map

needs

job

job

job

job

first-level via

first-level via

die is

bond needs

variants

limited by

drove invention of

die is

Bare silicon die

Packaging

Electrical connection

Mechanical protection

Heat removal

Fan-out to PCB pitch

Wire bonding

Flip-chip bumps

Face-up, perimeter pads

E_bond = thermal + mechanical + ultrasonic

Ball & wedge bonding

N = 4L / p perimeter limit

Face-down, area-array bumps

Hinglish (regional understanding)

Intuition Hinglish mein samjho

Dekho, jab wafer ban jaata hai aur usko chhote-chhote dies me kaat lete hain, to har die ek bahut hi naazuk kaanch jaisa hota hai — transistors micron-size ke, aur pads sirf 50-100 micron ke. Isko seedha PCB pe nahi laga sakte. Isliye packaging karte hain: die ko protect karo, heat nikalne ka raasta do, aur electrical connections banao. Yahi package ka kaam hai.

Connection banane ke do main tareeke hain. Pehla wire bonding — die ko seedha rakh ke (face-up) gond se chipka do, aur patli gold/copper taar se die ke edge wale pads se package ke legs tak "silai" kar do. Problem: taar sirf die ke rim/edge pe hi laga sakte ho, isliye connections kam milte hain — N=4L/pN = 4L/p (linear). Dusra flip-chip (C4) — die ke poore face pe chhote solder bumps uga do, phir die ko ulta (face-down) karke substrate pe daba do. Ab poora area kaam aata hai, to N=(L/p)2N=(L/p)^2 — bahut zyada connections!

Flip-chip ke teen bade fayde: (1) I/O bahut zyada kyunki area 2-D hota hai vs rim 1-D. (2) Bump chhota (~0.1 mm) hota hai vs taar lamba (~2 mm), isliye parasitic inductance kam — V=Ldi/dtV = L\,di/dt wala noise (ground bounce) kam hota hai, chip fast chalti hai. (3) Die ka back upar rehta hai, to heatsink lagana easy. Isiliye modern CPU/GPU sab flip-chip use karte hain.

Do cheezein yaad rakho: flip-chip me underfill epoxy zaroori hai kyunki silicon aur substrate ki CTE (thermal expansion) alag hai — garmi me bumps tootenge, underfill stress ko balance karta hai. Aur bonding me sirf heat badhana galat hai — zyada heat se brittle intermetallics (Au-Al "purple plague") ban jaate hain. Wire bonding purana zaroor hai par sasta hai, isliye microcontroller/LED/sensors me abhi bhi chalta hai.

Go deeper — visual, from zero

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