4.1.8 · D1Memory Technologies

Foundations — Flash memory (NOR vs NAND)

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This page assumes you know nothing. Before you can read the parent note, you need a small toolbox of ideas. We build each one from a picture, define its symbol, and say exactly why the topic needs it. Each idea depends only on the ones before it.


1. What a transistor switch even is

Forget electronics jargon. A transistor here is just a controllable gate for electric current: a tiny bridge between two wires that is either open (current flows) or shut (no current). A third terminal — the gate — decides which.

Why the topic needs it: a flash cell reads its stored bit by applying a fixed read push and watching whether current flows. No notion of "push," no notion of "read."


2. The tipping point: threshold voltage

Every such switch has a tipping point — the smallest push that flips it from shut to open. Below it: nothing. Above it: current flows.

Why the topic needs it: the entire bit-storage trick is "shift up or down." If you understand this one variable, you understand flash. See MOSFET and threshold voltage for the device physics.


3. The hidden bucket: the floating gate

Now add the flash-only part. Between the pushing gate and the current bridge, we bury an extra piece of metal completely wrapped in glass-like insulator (oxide). Nothing electrically connects to it — hence floating.

Why the topic needs it: this is the storage element. "Charge present" and "charge absent" are the two physical states that become the two logical bit values.


4. Turning charge into a bit: the 0/1 convention

Now we glue physics to logic. Pick one fixed read push. Two cases:

Bucket At read push, current... Reads as
Full (charged) high blocked 0
Empty (erased) low flows 1

Why the topic needs it: every "program = write 0," "erase = back to 1" statement in the parent note only makes sense once this inverted mapping is fixed.


5. How electrons cross a sealed wall: tunnelling

If the bucket is sealed in insulator, how do marbles ever get in or out? In everyday physics they can't — glass blocks them. But electrons are tiny enough to obey quantum tunnelling: with a strong enough electric field, an electron can appear on the other side of a thin insulating wall it should not be able to cross.

Why the topic needs it: this is the mechanism for both write and erase, and its wall-damage is the root cause of limited lifetime.


6. Counting settings: the logarithm and bits-per-cell

So far the bucket has two settings: full or empty = 1 bit. But what if we can fill it to quarter, half, three-quarter, full — four distinct weights? Then one cell stores more than one bit.

First, what is a bit? A bit is one yes/no answer — enough to pick between 2 options. Two bits pick between . Three bits pick between . In general, bits distinguish options.

We want the reverse question: given distinguishable levels, how many bits? That inverse of "raise 2 to a power" is the logarithm base 2, written .

Why and not division or itself? Because information is multiplicative: each extra bit doubles the choices. Counting choices needs ; counting bits needs its inverse, . Nothing else answers "how many yes/no answers hide in options."

Why the topic needs it: density claims (MLC/TLC/QLC) and the capacity-vs-endurance tradeoff are all stated in these terms.


7. Measuring area: the feature size and

To compare NOR and NAND cost, we compare how small a cell is. We measure length in units of the smallest line the factory can print, called the feature size .

Why the topic needs it: the parent's vs comparison is meaningless without knowing is an area in process units, and that a smaller number means a denser, cheaper chip.


8. Wearing out: P/E cycles and why controllers exist

From §5, every write forces electrons through the oxide wall, and each crossing chips at it. Eventually the wall leaks and the cell becomes unreliable.

Why the topic needs it: endurance, wear leveling, and the whole "why can't I edit one byte" story rest on this.


How these foundations feed the topic

Transistor switch and gate push V_G

Threshold voltage V_th the tipping point

Floating gate hidden electron bucket

0 or 1 convention inverted

Tunnelling electrons cross sealed wall

P E cycles oxide wears out

Bits per cell via log base 2

Feature size F and F squared area

NAND vs NOR density and cost

Wear leveling and controllers

Flash memory NOR vs NAND

This whole toolbox is non-volatile by construction — see Non-volatile memory — which is exactly what sets it apart from DRAM in the Memory hierarchy.


Equipment checklist

Cover the right side and answer each before reading the parent note.

What does mean, in plain words?
How hard we push on the gate (the control voltage in volts).
What is ?
The threshold — the exact push at which the switch turns on.
How do we read a stored bit without counting electrons?
Apply one fixed read push and see whether current flows (yes → 1, no → 0).
What is a floating gate?
An electrically isolated pocket that traps electrons for years, sealed in oxide.
Charged floating gate → which bit?
0 (high , does not conduct).
Empty/erased floating gate → which bit?
1 (low , conducts).
What is FN tunnelling used for?
Forcing electrons through the thin oxide to program (in) and erase (out).
Why does each write shorten cell life?
Every tunnelling crossing damages the oxide wall a little.
What does answer?
How many bits are needed to name distinct levels.
3 bits (TLC).
Why square to get area?
A cell takes space in two directions; length × width in units gives .
Smaller per cell means what for cost?
More cells per wafer → cheaper per bit.
What is a P/E cycle?
One program-then-erase of a block; cells survive only a limited number.