Channel length and short-channel effects — Hardware notes

WHAT is channel length?

WHY this definition? The gate can only "own" the mobile charge whose depletion charge sits directly beneath it. The source and drain junctions carve out their own depletion regions (triangular wedges) that extend laterally into the channel by $x_{dS}$ and $x_{dD}$ . When $L$ is large those wedges are a negligible fraction of the channel; when $L$ shrinks toward $x_{dS}+x_{dD}$ they consume the whole channel, so the gate governs far less charge than the simple model assumes.

Effect 1 — Threshold voltage roll-off ( $V_T$ lowering)

Long-channel threshold (bulk-charge term): $V_{T0} = V_{FB} + 2\phi_F + \frac{Q_B}{C_{ox}}, \qquad Q_B = \sqrt{2\,q\,\varepsilon_{si}\,N_A\,(2\phi_F)}$

Model the depletion region under the gate as a trapezoid rather than a rectangle. The gate "owns" the trapezoidal charge; the source/drain junctions own the two triangular corners. Let $x_j$ = junction depth and $x_{dm}$ = the vertical (into-the-bulk) gate depletion depth. Geometry of the trapezoid gives the fraction of bulk charge left to the gate:

$\frac{Q_B'}{Q_B} = 1 - \frac{x_j}{L}\left(\sqrt{1 + \frac{2 x_{dm}}{x_j}} - 1\right)$

Why this step? The two triangles removed from the rectangle have total area proportional to $x_j$ (how far the junctions reach) and inversely to $L$ (a fixed corner is a bigger fraction of a short channel). Substituting the reduced charge:

Effect 2 — Drain-Induced Barrier Lowering (DIBL)

Effect 3 — Velocity saturation & mobility degradation

Two distinct mobility-related effects hit the short device — one from the lateral field, one from the vertical field.

3a — Velocity saturation (lateral field)

$v = \frac{\mu E}{1 + E/E_{crit}} \xrightarrow{E \gg E_{crit}} v_{sat}=\mu E_{crit}$

Consequence: saturation current becomes linear in overdrive, not quadratic: $I_{D,sat} \approx W\, C_{ox}\, v_{sat}\,(V_{GS}-V_T) \quad\text{(vs. long-channel } \propto (V_{GS}-V_T)^2).$

3b — Vertical-field mobility degradation (surface scattering)

$\mu_{eff} = \frac{\mu_0}{1 + \theta\,(V_{GS}-V_T)}$

Why this step? $\theta$ (units $\text{V}^{-1}$ ) captures how strongly the vertical field $E_\perp \propto (V_{GS}-V_T)/t_{ox}$ crushes carriers into the interface. Higher overdrive → smaller $\mu_{eff}$ → the drive current rises sublinearly with $V_{GS}$ , on top of the velocity- saturation ceiling. Combined, the two effects severely blunt the ideal $\propto(V_{GS}-V_T)^2$ law.

Effect 4 — Channel Length Modulation (CLM)

In saturation the drain-side depletion pinches off the channel at length $L - \Delta L$ . As $V_{DS}$ rises, $\Delta L$ grows → effective channel shortens → $I_D$ keeps rising (finite output resistance): $I_D = I_{D,sat}\,(1 + \lambda V_{DS}), \qquad \lambda \propto \frac{1}{L}.$

Figure — Channel length and short-channel effects

Worked examples

Worked example Example 1 — Threshold roll-off magnitude

$N_A = 10^{17}\,\text{cm}^{-3}$ , $t_{ox}=4\,\text{nm}$ , $x_j=30\,\text{nm}$ , $x_{dm}=40\,\text{nm}$ , compare $L=1\,\mu\text{m}$ vs $L=50\,\text{nm}$ .

Step 1 — $C_{ox}=\varepsilon_{ox}/t_{ox}=3.45\times10^{-11}/4\times10^{-9}\approx8.6\times10^{-3}\ \text{F/m}^2$ . Why? We need charge-to-voltage conversion factor.

Step 2 — geometric factor $g=\frac{x_j}{L}(\sqrt{1+2x_{dm}/x_j}-1)$ . For $L=1\ \mu$ m: $g=\frac{30}{1000}(\sqrt{1+2.67}-1)=0.03\times0.916=0.027$ . For $L=50$ nm: $g=\frac{30}{50}(0.916)=0.55$ . Why? Same corner, but a 20× bigger fraction of the short channel.

Conclusion: $\Delta V_T$ is ~20× larger at 50 nm — roll-off is severe. Why it matters: $V_T$ spread across chip transistors ruins timing/leakage margins.

Common mistakes

Recall Feynman: explain to a 12-year-old

Imagine a garden hose (source→drain) with your hand (the gate) pinching it to control the flow. If the hose is long, your hand is clearly in charge. Now make the hose super short — your pinch and the two end-fittings are almost touching. The fittings themselves squeeze the hose, so water leaks even when you try to shut it, and the pressure at the far end (drain voltage) can push water through past your hand. That "the ends are now bossing the flow instead of you" is exactly short-channel effects.

Flashcards

When is a MOSFET considered "short-channel"?

When

L

is comparable to the sum of the source and drain lateral depletion widths, roughly

L \lesssim x_{dS}+x_{dD}

(the point where the two depletion regions meet).

Why does

V_T

roll off (decrease) with shorter

L

Source/drain junction depletion regions support part of the bulk charge, so the gate supports less charge

Q_B'

and needs less voltage;

\Delta V_T \propto 1/L

What is DIBL?

Drain-Induced Barrier Lowering: the drain field lowers the source-channel barrier, so higher

V_{DS}

effectively lowers

V_T

and increases leakage.

V_T = V_T(0)-\eta V_{DS}

What does velocity saturation do to the saturation current law?

Changes

I_{D,sat}

from

\propto (V_{GS}-V_T)^2

\propto (V_{GS}-V_T)

, since

v\to v_{sat}=\mu E_{crit}

What causes vertical-field mobility degradation?

High

V_{GS}

presses carriers against the rough Si–SiO₂ interface, adding surface-roughness/remote-coulomb scattering;

\mu_{eff}=\mu_0/(1+\theta(V_{GS}-V_T))

falls as overdrive rises.

What is channel-length modulation and how does it affect output resistance?

Saturation pinch-off shortens effective

L

\Delta L

V_{DS}

rises;

I_D=I_{D,sat}(1+\lambda V_{DS})

, giving finite output resistance,

\lambda\propto 1/L

What is punch-through?

When drain and source depletion regions merge, forming an ungated current path; the gate loses control and the switch fails.

How does DIBL affect off-state leakage numerically?

V_T

drop of

\Delta

raises

I_{off}

10^{\Delta/S}

where

S

is the subthreshold slope.

Formula for threshold roll-off from charge sharing?

\Delta V_T = -\frac{Q_B}{C_{ox}}\frac{x_j}{L}\left(\sqrt{1+2x_{dm}/x_j}-1\right)

, with

x_{dm}

the vertical gate depletion depth.

Which two directions of field cause the two different mobility effects?

Lateral field (

V_{DS}/L

) → velocity saturation; vertical field (

\propto(V_{GS}-V_T)/t_{ox}

) → surface-scattering mobility degradation.

Connections

MOSFET operation and regions
Threshold voltage and body effect
Subthreshold conduction and leakage
Velocity saturation and carrier transport
Surface scattering and effective mobility
Scaling theory (Dennard scaling)
Drain-Induced Barrier Lowering (DIBL)
Depletion region physics of pn junctions

Concept Map

Hinglish (regional understanding)

Intuition Hinglish mein samjho

Dekho, MOSFET basically ek switch hai jahan gate channel ko control karta hai jo source aur drain ko jodta hai. Jab channel lamba (long $L$ ) hota hai, gate hi boss hota hai — woh decide karta hai current chalega ya nahi. Lekin jab hum transistor ko chhota (nanometer scale) karte hain, tab drain gate ka control chhinne lagta hai. Yehi problems ko hum short-channel effects kehte hain. Rule of thumb yaad rakho: short-channel tab shuru hota hai jab $L \lesssim x_{dS}+x_{dD}$ — yani source aur drain ke lateral depletion widths milne lagein.

Char main cheezein yaad rakho (mnemonic "DR VC"): DIBL — drain ka electric field source ke paas ka barrier neeche gira deta hai, isliye $V_{DS}$ badhane se hi transistor thoda on ho jaata hai aur leakage badhta hai. **Roll-

Go deeper — visual, from zero

Connections