Visual walkthrough — Dark silicon problem

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Step 1 — What "power" even means for one transistor

WHAT. A transistor is a tiny switch. Every time it flips from OFF to ON, it charges up a tiny bucket of electric charge, and every time it flips back it dumps that charge as heat. The number of these flips per second, times the size of each dump, is power — energy burned per second, measured in watts (W).

WHY this first. Dark silicon is a heat problem. Before we can say why a chip runs too hot, we must count the heat one switch makes. Everything else is many copies of this.

PICTURE. Look at the picture: the magenta capacitor "bucket" fills to a height set by the supply voltage $V$ (how hard we push the charge), and it empties $f$ times each second (the clock frequency). The area of one fill is proportional to $C{V}^2$ — the bucket's width $C$ times the energy of the fill $V^2$.

Why $V^2$ and not $V$? Energy stored in a charged bucket is $\frac{1}{2}C{V}^2$ — push twice as hard and you store four times the energy, not twice. That quadratic is why voltage is the most powerful knob we have.

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Step 2 — Power per unit area: the crowding that actually burns you

WHAT. One transistor's watts are harmless. A billion of them packed into a fingernail-sized square is not. What melts a chip is power density — watts divided by area $A$.

WHY. A cooler can only pull so many watts off each square millimetre. So the quantity the physics cares about is not total power, it's power per area.

PICTURE. Two identical chips, same total watts (same total orange glow), but the right one packs it into a quarter of the area — the glow per square is four times brighter, and that is what the heatsink feels.

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Step 3 — Dennard's magic: why shrinking used to be free

WHAT. From 1974 to about 2005, every new "node" shrank each transistor's length by a factor $s$ (say $s=1.4$). Dennard's rule said: shrink voltage and capacitance by the same $s$, and let frequency rise by $s$. We now track what that does to power density.

WHY this step. We must see the old world working perfectly so that when it breaks in Step 4 the damage is obvious. This is the "before" photo.

PICTURE. The table on the arrow: each quantity carries its $s$-factor. Watch every $s$ cancel.

Result: twice as many transistors, same temperature. For thirty years, more meant free. See Dennard-scaling.

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Step 4 — The break: $V$ hits a floor

WHAT. Around 65 nm the voltage $V$ stopped shrinking. A transistor only turns on when $V$ rises meaningfully above a fixed threshold voltage $V_t$ — the minimum push needed to open the switch. $V_t$ barely scales, so once $V$ nears $\sim 0.7\text{V}$ it can go no lower without the switch failing to close.

WHY it matters. If $V$ is stuck but we still crank $f$ up by $s$ each generation, re-run Step 3 with $V$ frozen — the $\frac{1}{s^2}$ from voltage is gone.

PICTURE. The violet "voltage floor" line: earlier nodes slide down it freely; from 65 nm the dots pile up on the floor and cannot descend. Leakage (the orange seep-through even when OFF) climbs as insulation gets atom-thin.

Plus a second leak: as oxide thins to a few atoms, electrons tunnel straight through even when the switch is OFF, giving static (leakage) power $P_{\text{static}}=V{I}_{\text{leak}}$ that grows fast.

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Step 5 — The wall: a fixed power budget (TDP)

WHAT. A cooler removes at most a fixed number of watts. Manufacturers publish this ceiling as the Thermal Design Power, $P_{\text{TDP}}$. Draw more than $P_{\text{TDP}}$ and the chip overheats. It does not grow with the transistor count.

WHY. This ceiling is the wall the growing power density slams into. Transistors are cheap (Moore's Law, Mores-law); watts to run them are rationed (see TDP-and-power-budget).

PICTURE. A rising staircase (total power all cores want, doubling each node) capped by a flat navy ceiling (TDP). Everything above the ceiling is forbidden.

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Step 6 — Counting the cores we may light

WHAT. Divide the budget among the cores. Each core costs $P_{\text{core}}$ watts; you have $P_{\text{TDP}}$ to spend. The number you can turn on is the budget divided by the price, rounded down (you can't run half a core).

WHY the floor. $\lfloor x\rfloor$ (the floor function) means "throw away the fractional part." If the budget buys $8.7$ cores, you may light $8$ — the $0.7$ isn't enough for a ninth whole core.

PICTURE. A row of $N$ core-tiles; a magenta budget bar fills tiles left-to-right until the money runs out. Lit tiles glow; the rest stay dark violet.

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Step 7 — The dark fraction, assembled

WHAT. The fraction dark is the leftover share of the total wanted-power that the budget could not cover.

WHY. Utilization = what we can power ÷ what we could want $=\frac{P_{\text{TDP}}}{N{P}_{\text{core}}}$. Dark is simply everything not utilized: one minus that.

PICTURE. A full pie of area $N{P}_{\text{core}}$. The magenta slice is the powered part $P_{\text{TDP}}$; the violet rest is dark. Its angle is the dark fraction.

Worked check (2015 row of the parent table). $N=32$, $P_{\text{TDP}}=100$W, $P_{\text{core}}=12.5$W: $\text{Active}=\lfloor \frac{100}{12.5}\rfloor =8,\text{Dark}=1-\frac{100}{32\cdot 12.5}=1-\frac{100}{400}=0.75=75\%.$

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Step 8 — Every edge case (so you never hit an unshown one)

WHAT & WHY. The formula must behave at its extremes; here are all four corners.

PICTURE. Four mini-pies: generous budget, tight budget, the leakage caveat, and the DVFS rescue.

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The one-picture summary

Here is the whole chain on one canvas: one transistor's $\alpha C{V}^{2}f$ (Step 1) → density over area (Step 2) → Dennard's $s$-cancellation (Step 3) → the $V$-floor breaking it into $s^2$ growth (Step 4) → the flat TDP ceiling (Step 5) → floor-divide into active cores (Step 6) → the dark-fraction pie (Step 7).

Recall Feynman retelling — say it back in plain words

Every tiny switch on a chip burns heat proportional to how hard we push it, squared, times how fast it flips. Pack more switches into less space and the heat per square goes up. For thirty years a magic trick called Dennard scaling kept the heat-per-square constant: each shrink lowered voltage just enough to cancel the crowding. Then voltage hit a floor around three-quarters of a volt — below that the switches won't turn on — so the trick died. Now every shrink makes the chip hotter. But the cooler can only carry off a fixed number of watts (the TDP). So we take that fixed budget, divide it by what one core costs, and that's how many cores we're allowed to light — rounded down. The rest must stay off. The share left in the dark is one minus (budget over total wanted power). As we keep doubling transistors with a frozen budget, that dark share creeps toward 100%. It isn't truly free, because off transistors still leak. Our escapes are running everything slower and cooler (DVFS), cutting power completely (power gating), and building specialized cores that do more work per watt.

Recall Quick self-test

Why does frozen voltage change density growth from constant to $s^2$? ::: With $V$ fixed, the $\frac{1}{s^2}$ that voltage-squared used to contribute vanishes; the surviving $\frac{1}{s}$ (capacitance) and $s$ (frequency) leave $s^2/s^2$ in the wrong place, so density scales as $s^2$. A chip has $N=16$, TDP $=40$W, $P_{\text{core}}=8$W. Active cores and dark fraction? ::: Active $=\lfloor 40/8\rfloor =5$; dark $=1-40/(16\cdot 8)=1-40/128=0.6875=68.75\%$. Why round down when counting active cores? ::: You can't power a fractional core; leftover budget too small for a whole core is wasted, so use the floor function.