FinFET transistor structure: Visual walkthrough — Hardware deep dive

This walkthrough supports FinFET transistor structure and leans on the physics in Poisson's Equation in MOS Electrostatics. The problem it solves — leakage at tiny sizes — is Short-Channel Effects and DIBL. The reason we want to keep shrinking is Moore's Law and Dennard Scaling.

Step 1 — What are we even measuring? The channel and its "potential hill"

WHAT. We set up coordinates: let $y$ run along the channel (source → drain), and $x$ run across the thin silicon body (gate surface → gate surface).

WHY. Everything that follows is a competition between two bosses trying to set the barrier height: the gate (from the sides, along $x$ ) and the drain (from the far end, along $y$ ). We need axes to describe who wins where.

PICTURE. The fin lies on its side. The source and drain sit at the two ends; the gate wraps the middle. The purple curve on top is the potential barrier electrons must climb.

Step 2 — Poisson's equation: the rule the potential must obey

Term by term:

$\frac{\partial ^{2} ψ}{\partial x ^{2}}$ — how sharply the potential curves across the body (side to side). " $\partial$ " is a derivative when several variables exist; "squared" means curvature (rate of change of the slope).
$\frac{\partial ^{2} ψ}{\partial y ^{2}}$ — how sharply it curves along the channel (source to drain).
$ρ$ (rho) — the charge density sitting in the depleted silicon.
$ε_{s i}$ — the permittivity of silicon: how easily the material lets electric field pass. Big $ε$ = the material "soaks up" field.

PICTURE. Two little cartoons: a straight line (zero second derivative, no charge) versus a bent line (nonzero second derivative, charge present).

Step 3 — The parabola trick: guessing the shape across the fin

WHAT. We write the potential across the body ( $x$ -direction) as a parabola whose middle value is $ψ_{c} (y)$ — the potential at the centre of the channel, which still varies along $y$ : $ψ (x, y) = ψ_{c} (y) + c_{1} (y) x + c_{2} (y) x^{2}$

Term by term:

$ψ_{c} (y)$ — centre-line potential; the one number we actually care about, because the barrier lives here.
$c_{1} (y) x$ — a tilt (linear term).
$c_{2} (y) x^{2}$ — the curve (this is the parabola's belly).

WHY. A parabola is the lowest-order shape that can (a) match the gate boundary on the surfaces and (b) still have curvature. Choosing it turns an unknown function of $x$ into just three coefficients — a massive simplification, and a standard, physically honest one.

PICTURE. A slice across the fin: gate on the left and right, silicon between, and a parabolic dashed curve joining the two gated surfaces, dipping to $ψ_{c}$ in the middle.

Step 4 — Collapsing 2D into 1D: the equation for the barrier

WHAT. Substitute the parabola into Poisson's equation and use the gate boundary conditions to pin down $c_{1}, c_{2}$ . The across-fin curvature $\partial^{2} ψ / \partial x^{2}$ becomes a constant times $(ψ_{c} - ψ_{g a t e})$ . What remains is a clean 1D equation for the centre-line potential: $\frac{d ^{2} ψ _{c} ( y )}{d y ^{2}} - \frac{ψ _{c} ( y ) - ψ _{g a t e}}{λ ^{2}} = 0$

Term by term:

$\frac{d ^{2} ψ _{c}}{d y ^{2}}$ — curvature of the barrier along the channel (the drain's influence lives here).
$ψ_{c} (y) - ψ_{g a t e}$ — how far the channel has drifted from what the gate wants it to be.
$λ^{2}$ — a length-squared that measures how stiffly the gate pulls the channel back toward $ψ_{g a t e}$ .

PICTURE. A spring–mass analogy overlaid on the channel: the drain bends the barrier, a spring of stiffness $1/ λ^{2}$ (labelled) pulls it back to the gate's flat line.

Step 5 — Where $λ$ comes from, symbol by symbol

WHAT. The bookkeeping in Step 4 delivers exactly: $λ = \frac{ε _{s i} t _{s i} t _{o x}}{α ε _{o x}}$

Term by term, and which direction is "good" (smaller $λ$ ):

$ε_{s i}$ (numerator) — silicon permittivity. Fixed by the material.
$t_{s i}$ (numerator) — silicon body thickness = the fin width $W_{f in}$ . Thin fin ⇒ smaller $λ$ ⇒ good.
$t_{o x}$ (numerator) — gate-oxide thickness. Thin oxide ⇒ smaller $λ$ ⇒ good (see Gate Oxide and High-k Dielectrics).
$α$ (denominator) — number of gated surfaces: $1$ planar, $2$ double-gate, $\approx 3$ FinFET, $\to 4$ for Gate-All-Around Transistor. More gates ⇒ smaller $λ$ ⇒ good.
$ε_{o x}$ (denominator) — oxide permittivity.

PICTURE. Three fins side by side (planar $α = 1$ , double $α = 2$ , FinFET $α = 3$ ), each with springs drawn on the gated faces; a bar shows $λ$ shrinking as springs are added.

Step 6 — Cashing it in: how short can $L_{g}$ get?

WHAT. Plug the parent's numbers: $ε_{s i} = 11.7 ε_{0}$ , $ε_{o x} = 3.9 ε_{0}$ , $t_{s i} = 10 nm$ , $t_{o x} = 1 nm$ .

Planar, $α = 1$ : $λ = \frac{11.7}{3.9} \cdot 10 \cdot 1 = 30 \approx 5.5 nm \Rightarrow L_{g} ≳ 5 λ \approx 27 nm .$ FinFET, $α = 3$ : $λ = \frac{11.7}{3 \cdot 3.9} \cdot 10 \cdot 1 = 10 \approx 3.2 nm \Rightarrow L_{g} ≳ 5 λ \approx 16 nm .$

WHY it matters. The $ε_{0}$ cancels because only the ratio of permittivities survives — that's why we can work in relative numbers. Tripling the gates cut $λ$ by $3 \approx 1.73$ , so the same physics that dies at 27 nm on a planar device survives to 16 nm on a fin.

PICTURE. Two potential-barrier curves at the same short $L_{g}$ : the planar barrier sags in the middle (drain wins, leakage), the FinFET barrier stays tall (gate wins, OFF).

Step 7 — Degenerate & edge cases (never leave a scenario unshown)

$t_{o x} \to 0$ (perfect oxide): $λ \to 0$ . Infinitely strong gate control — the ideal transistor. This is why we chase thin oxides (and high- $k$ tricks) in Gate Oxide and High-k Dielectrics.
$t_{s i} \to \infty$ (fat body): $λ \to \infty$ . The gate loses control; the drain runs the channel. This is the leakage disaster of an ungated bulk device — the mistake "wide fins for more current" reintroduces exactly this.
$α = 1$ (planar limit): the formula reduces to the classic single-gate natural length. Our FinFET result correctly contains the planar case — a good sanity check.
$L_{g} ≫ λ$ (long channel): the drain term $d^{2} ψ_{c} / d y^{2}$ is tiny, the spring dominates, the barrier is flat and gate-controlled. This is why old, large transistors never needed fins.

PICTURE. A single chart: $λ$ plotted against fin width $t_{s i}$ for $α = 1, 2, 3$ , with the $t_{s i} \to 0$ and $t_{s i}$ -large limits marked, and a shaded "leakage danger" band where $λ$ is large.

The one-picture summary

This final figure stitches the chain together: Poisson's curvature rule → parabolic guess across the fin → 1D spring equation → the natural length $λ$ → the shortest survivable $L_{g}$ , with the FinFET winning because it presses on all three of $t_{s i}$ , $t_{o x}$ , $α$ at once.

Recall Feynman retelling — say it in plain words

Imagine the transistor's channel as a hill that electrons must climb; if the hill is tall, no current flows (OFF). The gate wants the hill tall; the drain, sitting at the far end, wants to flatten it so current leaks. Poisson's equation is the rulebook: charge makes the potential curve. We guessed the shape across the thin fin is a gentle parabola — because the gate holds both outer surfaces and something smooth connects them. Doing the algebra collapses the hard 2D problem into a simple 1D one: a barrier being bent by the drain but pulled back by a spring whose stiffness is $1/ λ^{2}$ . That single length $λ$ tells you how far the drain's meddling reaches. Make the fin thin, make the oxide thin, and add more gates, and $λ$ shrinks — so the spring is stiffer, the drain loses, and you can build a shorter, smaller transistor that still switches fully OFF. A planar device gives up around $L_{g} \approx 27$ nm; a three-sided fin fights on to $\approx 16$ nm. That $3$ -fold gain, dressed in silicon, is the whole reason FinFETs exist.

Recall

What does small $λ$ physically mean? ::: The gate's restoring "spring" is stiff, so the drain can't bend the channel barrier — strong gate control, less leakage. Why is the across-fin profile taken as a parabola? ::: It is the simplest smooth curve that matches the gate potential on both silicon surfaces while still allowing curvature. Why does $α$ appear in the denominator of $λ$ ? ::: Each gated surface adds a restoring pull; more gates = stiffer spring = smaller $λ$ . Tripling the gates changes $λ$ by what factor? ::: It divides $λ$ by $3 \approx 1.73$ , because $α$ is inside a square root. As $t_{o x} \to 0$ , what happens to $λ$ and why is that good? ::: $λ \to 0$ : infinitely strong gate control, the ideal fully-switchable transistor.