Flip-flops — SR, D, JK — storing one bit

WHAT is a flip-flop?

HOW feedback creates memory (derive from scratch)

Start with two NOR gates. Recall NOR: output is 1 only when both inputs are 0.

$\text{NOR}(a,b) = \overline{a + b}$

Cross-couple them: feed each gate's output into the other's input. This is the SR latch.

Inputs: $S$ (Set), $R$ (Reset).
Outputs: $Q$ and $\bar{Q}$ .

$Q = \overline{R + \bar Q}, \qquad \bar Q = \overline{S + Q}$

Why does this remember? Suppose $S=0, R=0$ . Plug into the equations: $Q$ depends on $\bar Q$ , and $\bar Q$ depends on $Q$ . If $Q=1$ then $\bar Q = \overline{0+1}=0$ , and $Q=\overline{0+0}=1$ ✓ — consistent. If $Q=0$ then $\bar Q=1$ and $Q=\overline{0+1}=0$ ✓ — also consistent. Both are stable, so the circuit holds whatever it had. That holding is the memory.

Figure — Flip-flops — SR, D, JK — storing one bit

Truth table of the NOR SR latch

$S$	$R$	$Q_{next}$	meaning
0	0	$Q$ (hold)	remember
1	0	1	Set to 1
0	1	0	Reset to 0
1	1	forbidden	both outputs 0, breaks $Q=\bar{\bar Q}$

D flip-flop — fixing the forbidden state

HOW: force $R = \bar S$ by tying $S=D$ and $R=\overline{D}$ . Now you can never have $S=R=1$ .

$Q_{next} = D$

Add a clock: only sample $D$ on the rising edge. Between edges the value is frozen.

$D$	$Q_{next}$
0	0
1	1

JK flip-flop — making the forbidden case useful

We engineer this by gating S and R with the current state: $S = J\bar Q, \qquad R = KQ$

Why? $J$ can only set when $Q$ is already 0 ( $\bar Q=1$ ); $K$ can only reset when $Q$ is already 1. So $S$ and $R$ are never both 1 — the forbidden state is structurally impossible.

$J$	$K$	$Q_{next}$	meaning
0	0	$Q$	hold
0	1	0	reset
1	0	1	set
1	1	$\bar Q$	toggle

Common mistake Steel-manning the wrong ideas

"A latch holds its value because nothing is changing it." Feels right — but a wire also doesn't change unless you change it, yet a wire has no memory; cut the source and it floats. The real reason is the feedback loop: the latch actively regenerates its own value, so it survives even when inputs go to the "hold" state. Fix: memory = self-sustaining feedback, not mere inactivity.

"D flip-flop and D latch are the same." A latch is transparent whenever enabled (follows $D$ continuously). A flip-flop only updates on a clock edge. Fix: edge-triggering is what makes registers update in lockstep without glitches.

" $J=K=1$ is illegal like $S=R=1$ ." Tempting by analogy. But JK was designed to make that case the toggle. Fix: the $J\bar Q,\,KQ$ gating removes the simultaneous-set-reset, so it's safe.

Recall Feynman: explain to a 12-year-old

Imagine a light switch that's a bit special: it has two "push spots", SET and RESET. Push SET and the light stays ON even after you let go. Push RESET and it stays OFF. That "staying" is memory — the switch remembers the last push. The clever part is two gates whispering each other's answer in a loop, so they keep repeating the value forever. A D version has just one button: whatever you hold (0 or 1) when the bell (clock) rings, it remembers. A JK version adds a magic combo: press both buttons and the light flips to the opposite of whatever it was. Stack 8 of these and you can remember a whole number — that's how a computer remembers things!

Flashcards

What is the minimal job of a flip-flop?

To store one bit (a single 0 or 1) and hold it after inputs change.

What property makes a circuit "bistable"?

It has two stable states it can rest in indefinitely.

What ingredient turns forgetful gates into memory?

Feedback (cross-coupling outputs back to inputs).

NOR SR latch: what does S=1,R=0 do?

Sets Q to 1.

NOR SR latch: what does S=0,R=1 do?

Resets Q to 0.

NOR SR latch: what does S=0,R=0 do?

Holds the previous Q (memory).

Why is S=R=1 forbidden in an SR latch?

It forces Q=Q̄=0, violating Q being the complement of Q̄; release causes a race.

How does a D flip-flop avoid the forbidden state?

It sets S=D and R=NOT D, so S and R are never both 1.

Characteristic equation of a D flip-flop?

Q_next = D.

What does the J=K=1 input do in a JK flip-flop?

Toggle: Q_next = NOT Q.

JK characteristic equation?

Q_next = J·Q̄ + K̄·Q.

How is the JK built to remove the forbidden state?

Gate inputs as S=J·Q̄ and R=K·Q so both can't be 1.

Latch vs flip-flop difference?

Latch is level-sensitive (transparent while enabled); flip-flop is edge-triggered.

What is an 8-bit register made of?

8 D flip-flops sharing one clock, capturing 8 bits at once.

Connections

Logic Gates — AND, OR, NOT, NAND, NOR — flip-flops are built from NOR/NAND
Boolean Algebra — used to derive characteristic equations
Clocks and Timing — edge-triggering and synchronous design
Registers and RAM — arrays of flip-flops storing words
Counters and State Machines — JK toggle drives binary counters
Combinational vs Sequential Logic — feedback = sequential

Concept Map

Hinglish (regional understanding)

Intuition Hinglish mein samjho

Dekho, ek normal logic gate ki problem ye hai ki wo "bhulakkad" hota hai — input badla, output turant badal gaya, purani value gayab. Lekin computer ko cheezein yaad rakhni padti hain (RAM, registers, counters). Iske liye chahiye flip-flop — sabse chhota circuit jo ek bit (0 ya 1) ko store kar sakta hai. Iska jaadu ek hi cheez se aata hai: feedback. Gate ka output wapas usi ke input mein daal do, aur circuit khud ko ek state mein "latch" kar leta hai, hamesha ke liye hold karta hai.

SR latch do NOR gates ko cross-couple karke banta hai. $S=1$ karo to $Q$ ban jata hai 1 (Set), $R=1$ karo to 0 (Reset), aur $S=R=0$ par wo apni purani value yaad rakhta hai — yahi memory hai. Par $S=R=1$ forbidden hai, kyunki ye $Q$ aur $\bar Q$ dono ko 0 bana deta hai, jabki dono ek dusre ke opposite hone chahiye.

D flip-flop is forbidden problem ko fix karta hai — sirf ek data wire $D$ do, aur jo $D$ hoga wahi store ho jayega ( $Q_{next}=D$ ). Clock ke edge par hi value capture hoti hai. 8 D flip-flops side-by-side = 8-bit register, yaani CPU ka ek register! JK flip-flop smart hai — wo $J=K=1$ wale case ko useful bana deta hai: toggle (bit ulta ho jata hai). Iski equation $Q_{next}=J\bar Q+\bar K Q$ hai, aur ye internally $S=J\bar Q$ , $R=KQ$ use karke forbidden state ko hi mita deta hai. Yaad rakhna: memory ka asli raaz "kuch nahi badal raha" nahi, balki feedback loop hai jo value ko khud regenerate karta rehta hai.

Test yourself — How Computers Work

Connections