Co-packaged optics trends: Visual walkthrough — Hardware deep dive

Step 1 — What is a bit, and what is bandwidth?

WHAT. A bit is one yes/no piece of information: a 1 or a 0. When a switch chip talks to the outside world, it sends bits one after another down a wire, incredibly fast. The number of bits it can send per second is called the bandwidth, written $B$ .

WHY. Before we can ask "how much power does the chip burn?", we need a clean count of how much work it is doing. Work here = bits pushed out per second. So $B$ is our measure of the traffic load.

PICTURE. Look at the figure: a stream of little squares (bits) marching off the chip into a wire. In one second, $B$ of them pass the finish line. A modern flagship switch pushes $B = 51.2$ trillion bits every second — that is the number $51.2 Tb/s$ ( $T = tera = 1 0^{12}$ ).

Step 2 — What is "energy per bit," $E_{b}$ ?

WHAT. Every single bit costs a little bit of energy to shove down the wire — to charge it up, drive it through the copper, and clean it up at the far end. Call that cost energy per bit, written $E_{b}$ . We measure it in picojoules per bit, $pJ/bit$ , where $1 pJ = 1 0^{- 12}$ joules (a joule is the everyday unit of energy; a picojoule is a trillionth of one — tiny, but you send trillions of bits).

WHY. Power is energy over time, and total energy is (energy per bit) × (number of bits). So if we know $E_{b}$ and $B$ , we can predict the total power. $E_{b}$ is the "price tag" stapled to each bit.

PICTURE. Each marching bit now carries a little coin — that coin is $E_{b}$ . A short, easy wire (right side) charges a cheap coin; a long, hard wire (left side) charges an expensive coin. Same message, different price.

Step 3 — Multiply them: the power formula appears

WHAT. Total electrical-interface power is $P = cost per bit (pJ/bit) E_{b} \times bits per second (b/s) B$

WHY this multiplication and not something else? Watch the units cancel — that is the whole justification: $\frac{joules}{bit} \times \frac{bit}{second} = \frac{joules}{second} = watts .$ "Bit" cancels top-and-bottom, leaving joules per second, and joules per second is exactly the definition of a watt (a watt = one joule of energy delivered every second). So multiplying is not a guess — it is the only combination whose units come out as power.

PICTURE. A rectangle: its width is $B$ (bits/s), its height is $E_{b}$ (energy/bit). The area of the rectangle is the power $P$ . Make the box taller (costlier bits) or wider (more bits) and the area — the power — grows.

Where does the big $E_{b}$ come from physically? That is the next step — and it is the heart of the whole CPO story. See SerDes and Wireline Links for the circuits that pay this cost.

Step 4 — Why long, fast wires cost more energy (the loss law)

WHAT. A copper trace attenuates (weakens) the signal. The weakening, in decibels (dB — a loudness-style ratio; more dB = more signal lost), grows as $A (dB) \approx loss rate per length α (f) \cdot length L, α (f) = skin effect a f + dielectric b f .$

Term by term:

$L$ = the length of the wire the signal must travel.
$f$ = the signal frequency (how fast the bits wiggle — higher line rate ⇒ higher $f$ ).
$α (f)$ = how many dB you lose per unit length; it rises with frequency.
$a f$ = the skin effect — at high frequency current crowds into the thin outer "skin" of the copper, raising resistance like $f$ .
$b f$ = dielectric loss — the insulator around the wire soaks up energy in direct proportion to $f$ .

WHY $f$ , and why does this matter for CPO? These two mechanisms are the reasons a faster wire is a leakier wire. Because $A$ is linear in $L$ (a straight multiply, not a curve), cutting the length by 100× cuts the dB loss by 100×. That is the geometric lever CPO pulls: shorten $L$ from ~15 cm to ~2 mm.

PICTURE. Two panels. Left: a bar chart of $α$ growing as frequency climbs (28→112→224 Gb/s). Right: a signal starting tall and shrinking as it travels — a long faceplate trace ends as a barely-visible wiggle; a millimeter CPO trace stays almost full height.

Step 5 — Turn the loss into $E_{b}$ : why big loss means expensive bits

WHAT. A weak, garbled signal at the far end must be rebuilt by equalizers (CTLE, DFE, FFE) and re-clocked. The more dB you lost, the harder these circuits work, and harder-working circuits burn more energy — so $E_{b}$ climbs with the recovered dB.

WHY. This is the bridge from Step 4's loss to Step 2's cost. Loss is a signal-integrity fact; $E_{b}$ is a power fact. The equalizer is the machine that converts "I lost 30 dB" into "I spent 5 pJ/bit fixing it."

PICTURE. A ramp: the horizontal axis is channel loss (dB), the vertical axis is $E_{b}$ (pJ/bit). A faceplate link sits high up the ramp (~5 pJ/bit); a CPO link sits at the bottom-left near ~1 pJ/bit. The arrow labelled "shorten $L$ " slides you down the ramp.

Step 6 — Plug in the numbers: the 256 W faceplate switch

WHAT. Use $P = E_{b} \times B$ with faceplate $E_{b} = 5 pJ/bit$ and $B = 51.2 Tb/s$ : $P = J/bit 5 \times 1 0^{- 12} \times bit/s 51.2 \times 1 0^{12} = 5 \times 51.2 = 256 W .$

WHY the exponents cancel. $1 0^{- 12}$ (pico) times $1 0^{12}$ (tera) is $1 0^{0} = 1$ — they annihilate perfectly. So the answer is just $5 \times 51.2$ . This is only the electrical I/O, sitting on top of the switch core's own power. 256 W is a space-heater's worth of power spent just getting bits to the faceplate.

PICTURE. The Step-3 rectangle drawn to scale for the faceplate case: tall box (5 pJ/bit) × wide (51.2 Tb/s) → a big red area labelled 256 W.

Step 7 — Now shorten the wire: the 51.2 W CPO switch

WHAT. Same bandwidth, but co-packaging drops $E_{b}$ to $1 pJ/bit$ : $P = J/bit 1 \times 1 0^{- 12} \times bit/s 51.2 \times 1 0^{12} = 1 \times 51.2 = 51.2 W .$

WHY. Only $E_{b}$ changed — $B$ (the traffic) is identical. That isolates the effect of reach alone. The saving is $256 - 51.2 = 204.8 W$ , i.e. $204.8/256 = 80%$ of this idealized SerDes-reach portion.

PICTURE. The two rectangles side by side: the tall red 256 W box and the short mint 51.2 W box, same width, with the shaved-off top region shaded as "≈ 200 W saved."

Step 8 — The edge cases (never let the reader hit an unshown scenario)

WHAT & WHY — four corners of the formula:

$B \to 0$ (idle switch). $P = E_{b} \times 0 = 0$ . No traffic, no I/O power — the formula degrades gracefully to zero. Good sanity check.
$L \to 0$ (monolithic/optical I/O, the "Future" row). Loss $A = α \cdot 0 = 0$ dB, so equalization → minimal, $E_{b}$ → its irreducible floor (not literally zero: you still pay for drivers, modulators, lasers). This is why even perfect co-packaging cannot reach 0 pJ/bit.
$B$ doubles (12.8 → 25.6 → 51.2 → 102.4 Tb/s). If $E_{b}$ stayed fixed, $P$ would merely double. But faster lanes push $f$ up, so $α (f)$ rises, so $E_{b}$ also rises — $P$ grows super-linearly. That compounding is the real crisis, and the reason the CPO pressure keeps mounting each generation.
Very high $E_{b}$ (224 Gb/s over copper faceplate). As $L$ stays long while $f$ soars, $A$ blows past the equalizer's recoverable budget — the link simply stops working, not just wastes power. This is the hard wall CPO exists to jump over.

PICTURE. Four mini-panels: (a) idle → 0 W; (b) $L \to 0$ hitting an $E_{b}$ floor; (c) super-linear curve of $P$ vs $B$ arcing above the straight "if $E_{b}$ fixed" line; (d) a red "copper cliff" where loss exceeds the recoverable budget.

The one-picture summary

WHAT. One diagram compresses the whole derivation: length → loss → equalization → $E_{b}$ → $P = E_{b} B$ → the 256 W vs 51.2 W boxes. Follow the arrows top to bottom and you have re-derived the parent note's central result from a definition of "bit."

Recall Feynman: the whole walkthrough in plain words

A chip sends bits — little yes/no messages — down a wire, trillions per second; that count is $B$ . Each bit costs a pinch of energy, $E_{b}$ , just to get across. Multiply the pinch by the count and you get watts, because the units force it: energy-per-bit times bits-per-second is energy-per-second, which is a watt.

Now, why is the pinch big? Because copper wires leak signal, and they leak more the longer and faster they run. A weak signal at the far end has to be rebuilt by clever (power-hungry) circuits — so long wires make each bit expensive. A 51.2 Tb/s switch shouting all the way to its faceplate pays about 5 pJ per bit and burns 256 watts just on I/O. Bring the optics right next to the chip so the wire is millimeters, the leak nearly vanishes, the rebuild circuits relax, the pinch falls to about 1 pJ, and the power drops to ~51 watts. That 80% cut is the reach slice; count everything else and the honest whole-link win is 30–50%. And you can never hit zero, because lasers, modulators and drivers always cost something.

Recall Quick self-test

Faceplate power at 5 pJ/bit and 51.2 Tb/s? ::: $5 \times 1 0^{- 12} \times 51.2 \times 1 0^{12} = 256$ W. Why multiply $E_{b}$ by $B$ ? ::: Units: (J/bit)(bit/s) = J/s = watts. Why does short reach cut $E_{b}$ ? ::: Loss $A = α L$ is linear in length; less loss ⇒ less equalization ⇒ less energy/bit. Why can't $E_{b}$ reach 0 even at $L = 0$ ? ::: Drivers, modulators, TIAs and laser inefficiency set a non-zero floor.

Related: Silicon Photonics · 2.5D and 3D Packaging · Switch ASIC Bandwidth Scaling · Thermal Management in Packages · Pluggable Optical Modules (QSFP-DD, OSFP) · Data Center Network Topologies