Exercises — Voltage droop and decoupling capacitors

What tool & why: droop from a changing current is the inductor law $V_L=Ldi/dt$ — the resistor law $IR$ would answer a steady-current question, but here nothing is steady; current is slewing. Compute the slew rate first: $\frac{di}{dt}=\frac{30\text{ A}}{0.5\times 10^{-9}\text{ s}}=6\times 10^{10}\text{A/s}$ Then the voltage: $V_L=L\frac{di}{dt}=150\times 10^{-12}\times 6\times 10^{10}=9\text{ V}$ Nine volts of transient droop from a "tiny" 150 pH — that is the villain the parent note warned about.

What tool & why: the cap's impedance is $Z_{cap}=ESR+j\omega ESL+\frac{1}{j\omega C}$. Each term wins on a different frequency because of the $\omega$ (frequency) inside it.

• (a) Low $\omega$: $\frac{1}{\omega C}$ blows up (small $\omega$ in the denominator) → the capacitive term dominates. The cap "works" as a charge bucket.
• (b) High $\omega$: $\omega ESL$ grows with frequency → the inductive ($ESL$) term dominates. The cap "looks like an inductor" and stops helping. This is exactly why one cap can't cover all frequencies.

What tool & why: we want the cap to supply the charge burst while sagging no more than the budget. Rearranging $\Delta V=\frac{\Delta I\Delta t}{C}$ for $C$ gives the sizing box: $C\ge \frac{\Delta I\Delta t}{\Delta V_{max}}$ Charge the cap must deliver: $Q=\Delta I\Delta t=25\times 3\times 10^{-9}=75\text{ nC}$. Minimum cap: $C\ge \frac{75\times 10^{-9}\text{ C}}{0.04\text{ V}}=1.875\times 10^{-6}\text{ F}=1.875\mu F$ So a $\ge 1.875\mu F$ cap holds the rail within 40 mV during this burst.

What tool & why: $f_0$ is where the inductive term $\omega ESL$ and the capacitive term $1/(\omega C)$ cancel — the impedance dips to its minimum ($=ESR$). Setting them equal gives: $f_0=\frac{1}{2\pi \sqrt{ESL\cdot C}}$ Compute the product under the root: $ESL\cdot C=0.8\times 10^{-9}\times 47\times 10^{-9}=3.76\times 10^{-17}$. $\sqrt{3.76\times 10^{-17}}=6.13\times 10^{-9}$ $f_0=\frac{1}{2\pi \times 6.13\times 10^{-9}}\approx 2.60\times 10^7\text{ Hz}=26.0\text{ MHz}$ Above ~26 MHz this cap turns inductive — you'd hand faster spikes to a smaller cap.

What tool & why: the extra trace is just more series $L$ between cap and load; its droop is again $V_L=Ldi/dt$. Only the added 80 pH matters for the "extra" question. $\frac{di}{dt}=\frac{40}{1\times 10^{-9}}=4\times 10^{10}\text{A/s}$ $V_{extra}=80\times 10^{-12}\times 4\times 10^{10}=3.2\text{ V}$ The cap can be perfectly sized, yet 80 pH of distance injects 3.2 V of droop that the cap cannot fix — because the extra $L$ sits between the cap and the die. This is why layout is placement, not just value.

(a) No-cap inductive droop ($V_L=Ldi/dt$): $\frac{di}{dt}=\frac{50}{1\times 10^{-9}}=5\times 10^{10}\text{A/s},V_L=500\times 10^{-12}\times 5\times 10^{10}=25\text{ V}$ 25 V of droop on a 1 V rail — the chip is dead. (b) Sizing the local cap ($C\ge \Delta I\Delta t/\Delta V_{max}$). Convert first so every number is base SI — amps stay amps, but $\Delta t=1\text{ ns}=1\times 10^{-9}\text{ s}$: $C\ge \frac{\Delta I\Delta t}{\Delta V_{max}}=\frac{(50\text{A})\times (1\times 10^{-9}\text{s})}{0.05\text{V}}=\frac{50\times 10^{-9}\text{A⋅s}}{0.05\text{V}}=1\times 10^{-6}\text{ F}=1\mu F$ Note the numerator carries units A·s = coulombs; dividing by volts gives farads. That unit tag is the guardrail against forgetting the $10^{-9}$ on the nanoseconds. (c) Why the cap wins: the local cap sits before the 500 pH, so during the 1 ns slew the fast current flows out of the cap (low-inductance loop) instead of through the wire — the wire's current is allowed to ramp slowly, so its $di/dt$, and therefore its droop, stays tiny.

Big cap $f_0$: $f_{0,\text{big}}=\frac{1}{2\pi \sqrt{2\times 10^{-9}\cdot 10\times 10^{-6}}}=\frac{1}{2\pi \sqrt{2\times 10^{-14}}}\approx 1.13\text{ MHz}$ Small cap $f_0$: $f_{0,\text{small}}=\frac{1}{2\pi \sqrt{0.3\times 10^{-9}\cdot 1\times 10^{-9}}}=\frac{1}{2\pi \sqrt{3\times 10^{-19}}}\approx 290.6\text{ MHz}$ Choice for 200 MHz: the big cap is already inductive ($200\text{ MHz}\gg 1.13\text{ MHz}$) — useless. The small cap resonates at ~291 MHz, so at 200 MHz it is still below its $f_0$ → still capacitive → it's the one that handles the fast event. This is the hierarchy in action: small+close = fast.

What tool & why: at $f_0$ the inductive term $\omega ESL$ and capacitive term $1/(\omega C)$ cancel exactly in $Z_{cap}=ESR+j(\omega ESL-1/(\omega C))$. The imaginary part is zero, so only the real part survives. (a) Impedance at resonance: $|Z_{cap}(f_0)|=ESR=15\text{ m}\Omega =0.015\Omega$ This is the minimum the cap ever reaches — the very bottom of the V-curve in the figure above. (b) Droop from that ripple (Ohm's law, because at resonance the cap is purely resistive): $\Delta V=I_{ripple}\times ESR=6\text{A}\times 0.015\Omega =0.090\text{ V}=90\text{ mV}$ Which parameter set it: $ESR$ alone. Even a "perfect" $C$ and tiny $ESL$ cannot push impedance below $ESR$, so at the resonant valley the floor of the droop is fixed by resistance — this is the real-world edge case the ideal $\Delta I\Delta t/C$ formula hides.

The systematic rule: the split is not arbitrary. The inductive term $L_{loop}di/dt$ is fixed by the layout and the slew — it does not contain $C$, so we compute it first and subtract it from the total budget. The cap only gets what is left. That is the method. (a) Inductive term ($di/dt=40/2\text{ ns}=2\times 10^{10}\text{A/s}$): $\Delta V_L=L_{loop}\frac{di}{dt}=50\times 10^{-12}\times 2\times 10^{10}=1.0\text{ V}=1000\text{ mV}$ Reality check: the inductive term alone is $1000\text{ mV}$ — ten times the entire $100\text{ mV}$ budget. There is no positive remainder left for the cap: this design is infeasible as stated. No capacitor can rescue it, because the loop inductance seen by a 2 ns edge already blows the budget by itself. (b) Budget left for the cap: $\Delta V_{budget}-\Delta V_L=100-1000=-900\text{ mV}$ — negative, confirming infeasibility. (c) The fix the algebra forces: you must first drive the inductive term down. To leave the cap a workable slice — say we demand $\Delta V_L\le 20\text{ mV}$ — solve for the required loop inductance: $L_{loop}\le \frac{20\times 10^{-3}}{2\times 10^{10}}=1\times 10^{-12}\text{ H}=1\text{ pH}$ i.e. the 50 pH must be cut to $\le 1\text{ pH}$ (on-die/on-package placement). Then the cap gets $100-20=80\text{ mV}$, and $C\ge \frac{\Delta I\Delta t}{80\text{ mV}}=\frac{40\times 2\times 10^{-9}}{0.08}=1\times 10^{-6}\text{ F}=1\mu F.$ The lesson: the budget split is decided by physics — compute the layout-fixed inductive term first; if it already exceeds the budget, the answer is "fix the layout," and only the leftover goes to sizing $C$.

Bulk cap: $f_{0,1}=\frac{1}{2\pi \sqrt{1.5\times 10^{-9}\cdot 22\times 10^{-6}}}=\frac{1}{2\pi \sqrt{3.3\times 10^{-14}}}\approx 0.876\text{ MHz}$ Hmm — $0.876\text{ MHz}$ is below 1 MHz, so the bulk cap is already slightly inductive at the band's bottom edge. In practice bulk caps overlap the low end; here treat 1 MHz as effectively their crossover — they carry the sub-MHz droop and hand off near 1 MHz. Ceramic cap: $f_{0,2}=\frac{1}{2\pi \sqrt{0.5\times 10^{-9}\cdot 22\times 10^{-9}}}=\frac{1}{2\pi \sqrt{1.1\times 10^{-17}}}\approx 48.0\text{ MHz}$ The ceramic is capacitive up to ~48 MHz. Gap check: from ~48 MHz to 150 MHz neither cap is below its $f_0$ — so this pair does not fully cover to 150 MHz. You'd need a third, smaller cap (e.g. sub-nF, on-package) whose $f_0>150\text{ MHz}$. This is the honest answer: two caps leave a high-frequency hole, proving why the hierarchy usually has three tiers (bulk / ceramic / on-die).

Set up the boundary: we want $f_0=100\text{ MHz}$. Invert the resonance formula for $C$: $f_0=\frac{1}{2\pi \sqrt{ESL\cdot C}}⟹C=\frac{1}{(2\pi f_0{)}^{2}ESL}$ Why invert, not guess: we're asked for the exact tipping point, so we solve the equation rather than trying values. Compute step by step with $f_0=100\text{ MHz}=1\times 10^8\text{ Hz}$ and $ESL=0.5\text{ nH}=0.5\times 10^{-9}\text{ H}$: $2\pi f_0=2\pi \times 10^8=6.283\times 10^8\text{rad/s}$ $(2\pi f_0{)}^2=(6.283\times 10^8{)}^2=3.948\times 10^{17}$ $C=\frac{1}{(2\pi f_0{)}^{2}ESL}=\frac{1}{3.948\times 10^{17}\times 0.5\times 10^{-9}}=\frac{1}{1.974\times 10^8}\approx 5.07\times 10^{-9}\text{ F}\approx 5.07\text{ nF}$ Final answer: the critical capacitance is $\boxed{C\approx 5.07\text{ nF}}$. Interpretation: with this fixed 0.5 nH package, a cap larger than ~5.07 nF has $f_0<100\text{ MHz}$, i.e. it is inductive at 100 MHz. Making $C$ bigger pushes $f_0$ down, dragging its useful band away from your target. Beyond 5.07 nF you must instead reach for a lower-$ESL$ package to keep $f_0$ up — capacitance alone can't buy high-frequency response.

What tool & why: droop from an impedance is the definition from the parent note, $\Delta V=\Delta I\cdot Z_{PDN}$ — here we're given an effective $Z_{PDN}$ directly, so no $R$/$L$ split is needed. (a) Compute droop: $\Delta V=35\times 2.0\times 10^{-3}=0.070\text{ V}=70\text{ mV}$ Floor voltage $=1.00-0.070=0.93\text{ V}$. Since $0.93\text{ V}>V_{min}=0.92\text{ V}$, the chip survives with 10 mV to spare. (b) Minimum rail if we want the floor exactly at $V_{min}$: we need $V_{rail}-\Delta V\ge V_{min}$, so $V_{rail,\min }=V_{min}+\Delta V=0.92+0.070=0.99\text{ V}$ So even $0.99\text{ V}$ would just barely hold; running at $1.00\text{ V}$ gives the 10 mV cushion. (DVFS lowering the rail below 0.99 V would let this event dip under $V_{min}$.) (c) Timing link: below $V_{min}$ transistors switch too slowly to meet the clock period, so the droop directly eats into clock timing margin — droop control is timing-margin control.