This page assumes nothing. The parent topic's headline result is a formula that predicts how much power a chip's switching burns. That formula uses several letters you may never have met — a "how busy" number, a "bucket size," a "ticks per second." We will not write the formula yet: we build every letter from a picture first, one at a time, in the order they depend on each other, and only then assemble them. If the parent note used a symbol, we earn it here.
Everything electrical starts with three ideas. Picture electricity as water in pipes.
Figure s01 (below) puts all three on one picture: the tank holds the charge (the water sitting in it), the tank height is the voltage pushing that water out, and the flow through the pipe is the current. Read it left-to-right before moving on — the rest of the page keeps returning to this water picture.
We now have Q, V, and I. The relationship that ties charge to voltage needs one more idea — capacitance — so we build that next, then write the link.
Now that C is defined, we can state the link between charge, capacitance, and voltage:
Figure s02 (below) shows this two ways: on the left, a narrow bucket (small C) versus a wide bucket (large C) holding the same water at different levels; on the right, Q=C⋅V drawn as a straight line whose steepness is C — a bigger C is a steeper line, storing more charge for the same voltage.
Real chip capacitances are tiny, so we use prefixes:
More on where these capacitors physically come from: Capacitance in VLSI.
The parent note's Step 1 uses an integral. Here is that tool, from zero, applied to the exact quantity we need.
Now we actually do the sum. As charge q accumulates on the capacitor, the voltage across it at that instant is v=q/C (just Q=CV rearranged). So the energy stored while filling from 0 to final charge Q is:
Estored=∫0Qvdq=∫0QCqdq=C1⋅2q20Q=2CQ2
WHAT we just did: summed the (rising) capacitor voltage q/C over every slice of charge. WHY: the voltage grew as we filled, so a plain multiply would be wrong — the integral captures the growth. WHAT IT LOOKS LIKE: the triangular area under the straight line v=q/C (a triangle's area is 21×base×height, which is exactly the 21).
Substituting Q=CV turns this into the form you will use everywhere:
This is the missing link the parent note's "average voltage is Vdd/2" line was quietly pointing at. Keep 21CV2 in your pocket.
Figure s03 (below) draws the CMOS pair: the blue PMOS pull-up connects the output to Vdd, the green NMOS pull-down connects it to ground, and the gray load capacitor on the right is the "bucket" being filled or drained. The orange arrow shows the short-circuit path — the brief window during a transition where both switches are partly open, letting current run straight from Vdd to ground.
The brief moment where both taps are open at once — during a transition — is the short circuit the parent note warns about. Its size depends on how slowly the input changes: see Signal Transition Time.
Now every letter is earned, so we can build the parent topic's headline result — the promised goal of this page.
Chain the pieces together:
Filling the load capacitor once from 0 to Vddand draining it again costs, in total, energy Ecycle=CVdd2 (half lost charging, half discharging — each half is the 21CVdd2 we derived in section 4).
A node only switches on a fractionα of ticks, and ticks come at rate f per second, so switching events per second =αf.
Power is energy-per-event times events-per-second (the bridge from section 3): P=Ecycle×αf.
Read it top-down: the three raw quantities (Q, V, C) combine via Q=CV into the energy to fill a capacitor21CV2; add frequency and activity to get dynamic power; the transistor's imperfection (worsened by temperature) gives leakage and hence static power; both sum to the chip's total heat.