Foundations — Dynamic vs static power consumption

6.4.1 · D1 · Hardware › Power, Thermal & Reliability › Dynamic vs static power consumption

Is page par kuch bhi assume nahi kiya gaya. Parent topic ka headline result ek aisa formula hai jo predict karta hai ki ek chip ki switching kitna power burn karti hai. Woh formula kai aisi letters use karta hai jo shayad aapne kabhi na dekhi hon — ek "kitna busy hai" number, ek "bucket size," ek "ticks per second." Hum abhi formula nahi likhenge: hum pehle har letter ko ek picture se build karenge, ek ek karke, us order mein jis order mein woh ek doosre par depend karte hain, aur tabhi unhe assemble karenge. Agar parent note ne koi symbol use kiya, toh hum usse yahan earn karte hain.

1. Voltage, Charge, Current — teen raw quantities

Har electrical cheez teen ideas se shuru hoti hai. Electricity ko paaniyon mein pipes ki tarah imagine karo.

Figure s01 (neeche) teeno ko ek hi picture par rakhti hai: tank charge pakdti hai (usmein baitha paani), tank ki unchaai woh voltage hai jo us paani ko bahar dhakelta hai, aur pipe se flow woh current hai. Aage badhne se pehle ise left-to-right padhein — is page ka baki hissa is water picture par baar baar wapas aata hai.

Ab hamare paas $Q$, $V$, aur $I$ hain. Jo relationship charge ko voltage se jodti hai uske liye ek aur idea chahiye — capacitance — toh hum woh pehle build karte hain, phir link likhte hain.

2. Capacitance $C$ — electric bucket

Ab jo $C$ define ho gayi, hum charge, capacitance, aur voltage ke beech ka link bata sakte hain:

Figure s02 (neeche) ise do tarighon se dikhata hai: left par, same paani ko alag levels par pakde hue ek tanga bucket (chhhoti $C$) versus ek chauda bucket (badi $C$); right par, $Q=C\cdot V$ ko ek seedhi line ki tarah draw kiya gaya hai jis ki steepness $C$ hai — bada $C$ ek steeper line hai, same voltage ke liye zyada charge store karta hai.

Real chip capacitances bahut chhoti hoti hain, isliye hum prefixes use karte hain:

In capacitors ki physical origin ke baare mein aur zyada: Capacitance in VLSI.

3. Energy $E$ aur Power $P$ — woh difference jo poore topic ka naam hai

Yeh dono aksar confuse hote hain, isliye hum inhe pictures ke saath alag karte hain.

4. Integral, aur capacitor-charging energy $\frac{1}{2}C{V}^2$

Parent note ka Step 1 ek integral use karta hai. Yahan woh tool hai, zero se, exactly us quantity par apply kiya gaya jo humein chahiye.

Ab hum actually sum karte hain. Jaise jaise charge $q$ capacitor par jama hota hai, us waqt us par voltage hai $v=q/C$ ($Q=CV$ ko rearrange karke). Toh $0$ se final charge $Q$ tak bharte waqt stored energy hai:

$E_{\text{stored}}={\int }_0^{Q}vdq={\int }_0^Q\frac{q}{C}dq=\frac{1}{C}\cdot \frac{q^2}{2}{|}_0^Q=\frac{Q^2}{2C}$

HUMNE KYA KIYA: (badhte hue) capacitor voltage $q/C$ ko charge ke har slice par sum kiya. KYUN: jaise jaise hum bharte gaye voltage badhta gaya, isliye plain multiply galat hota — integral us growth ko capture karta hai. YEH KAISA DIKHTA HAI: seedhi line $v=q/C$ ke neeche triangular area (triangle ka area $\frac{1}{2}\times \text{base}\times \text{height}$ hota hai, jo exactly woh $\frac{1}{2}$ hai).

$Q=CV$ substitute karne se yeh us form mein aa jaata hai jise aap har jagah use karenge:

Yeh missing link hai jis ki taraf parent note ki "average voltage is $V_{dd}/2$" wali line quietly point kar rahi thi. $\frac{1}{2}C{V}^2$ apni pocket mein rakhein.

5. Frequency $f$ — kitni baar switching hoti hai

Power bachane ke liye clock slow karna exactly wahi hai jo Dynamic Voltage Frequency Scaling (DVFS) karta hai.

6. Transistor as a switch, aur $V_{th}$

Figure s03 (neeche) CMOS pair draw karta hai: blue PMOS pull-up output ko $V_{dd}$ se connect karta hai, green NMOS pull-down use ground se connect karta hai, aur right par gray load capacitor woh "bucket" hai jo bhara ya khaali kiya ja raha hai. Orange arrow short-circuit path dikhata hai — transition ke dauran woh brief window jab dono switches thode khule hote hain, current ko seedha $V_{dd}$ se ground tak jaane dete hain.

Woh brief moment jab dono taps ek saath khule hon — transition ke dauran — woh short circuit hai jiske baare mein parent note warn karta hai. Iska size is baat par depend karta hai ki input kitni dheere badle: Signal Transition Time dekhein.

7. Activity factor $\alpha$

8. Dynamic-power formula assemble karna

Ab har letter earn ho gayi hai, isliye hum parent topic ka headline result build kar sakte hain — is page ka promised goal.

Pieces ko chain karo:

1. Load capacitor ko ek baar $0$ se $V_{dd}$ tak bharna aur phir se khaali karna, total mein energy cost karta hai $E_{\text{cycle}}=C{V}_{dd}^2$ (charging mein aadha khoya, discharging mein aadha — har aadha woh $\frac{1}{2}C{V}_{dd}^2$ hai jo humne section 4 mein derive ki).
2. Ek node sirf fraction $\alpha$ ticks par switch karta hai, aur ticks $f$ per second ki rate par aate hain, isliye switching events per second $=\alpha f$.
3. Power energy-per-event times events-per-second hai (section 3 ka bridge): $P=E_{\text{cycle}}\times \alpha f$.

Yeh sab topic ko kaise feed karta hai

Ise top-down padhein: teen raw quantities ($Q$, $V$, $C$) $Q=CV$ ke zariye capacitor bharne ki energy $\frac{1}{2}C{V}^2$ mein combine hoti hain; frequency aur activity add karo toh dynamic power milti hai; transistor ki imperfection (temperature se aur buri hoti hui) leakage aur isliye static power deti hai; dono chip ki total heat mein sum ho jaate hain.

Equipment checklist

Right side cover karo aur zor se jawab do. Agar aap kar sakte hain, toh D2 ke liye ready hain.