The four figures below carry the physical pictures the questions lean on — glance at them first so each trap is answered from the geometry, not from memory.
1 — The floating-gate cell (the heart of EPROM/EEPROM/Flash).
A normal MOSFET has one gate. The floating-gate transistor slips a second gate — the floating gate — into the oxide, completely surrounded by insulator. Electrons forced onto it are trapped there with power off. That trapped charge is the stored bit.
Look at the coral floating gate: it touches no wire. That isolation is exactly why "the gate is connected by a thin wire" (a Spot-the-error item) is wrong, and why charge survives ~10 years.
2 — Why the bit is readable: the threshold-voltage shift.
Trapped electrons repel the current that wants to flow in the channel, so the transistor only turns on at a higher gate voltage — its threshold voltage Vth shifts right. At the fixed read voltage (dashed line) the empty cell conducts and the charged cell does not. That on/off split is the 0 versus 1.
3 — Why charge stays put: tunneling is exponentially rare.
Charge leaks off only by quantum tunneling through the oxide barrier. Inside the insulator the electron's wavefunction decays exponentially with distance, so a thicker barrier tox makes the escape probability collapse. That is the whole Fowler–Nordheim / WKB idea in one plot — see Fowler–Nordheim Tunneling.
The left panel shows the shrinking wavefunction inside the barrier; the right panel shows leakage current plummeting as thickness grows. Because it is exponential, a modest oxide already buys decade-scale retention — the answer to "why exponential, not linear."
4 — Erase granularity: EPROM vs EEPROM vs Flash.
This is the single feature the topic tests most. UV erases the whole EPROM chip at once; EEPROM erases one byte electrically in-circuit; Flash erases a whole block electrically to save area.
Keep this strip in mind: nearly every "spot the error" below swaps two of these three columns.
Each item is a claim. Decide true or false, then say why — the reveal always gives the reasoning, never a bare verdict.
ROM stands for "Read-Only," which means the CPU cannot even read from it.
False. "Read-Only" describes writing, not reading — the CPU reads ROM constantly (e.g. boot code). It just cannot write to it. See Boot Firmware and BIOS.
All four members (ROM, PROM, EPROM, EEPROM) keep their data with the power off.
True. They are all non-volatile; retention is the whole reason the family exists. They differ only in who can rewrite them and how, not in whether data survives power-off. Contrast with RAM in Volatile vs Non-Volatile Memory.
A blank PROM already contains the manufacturer's firmware, which you overwrite.
False. PROM ships blank (all fuses intact); the user burns the pattern in once. Only Mask ROM has data written at the factory.
EPROM can be erased and reprogrammed while it stays soldered in the circuit.
False. EPROM erase needs UV light through a quartz window (figure 4, left column), so the chip is typically pulled out and put under a UV lamp for minutes. Only EEPROM erases in-circuit.
EEPROM erases the entire chip at once, just faster than EPROM.
False. EEPROM's key advantage is byte-by-byte erase (figure 4, middle column), not just speed. Whole-block erasure is Flash, the density-optimized cousin.
Because EEPROM is non-volatile, you can rewrite the same byte an unlimited number of times.
False. Each write slightly damages the oxide around the floating gate; endurance is finite (104–106 cycles). Non-volatile means "survives power-off," not "immortal."
Flash memory and EEPROM store bits by completely different physical mechanisms.
False. Both trap charge on the same floating gate of figure 1 and both erase electrically. The difference is granularity (figure 4): EEPROM erases per byte, Flash erases in large blocks. See Floating-Gate Transistor.
Trapped charge on the floating gate leaks away in seconds, so EEPROM needs a battery.
False. Leakage is by slow tunneling through the oxide and falls exponentially with oxide thickness (figure 3), giving retention on the order of ~10 years — no battery needed. Physics in Fowler–Nordheim Tunneling.
Each statement contains one wrong idea. Name it and correct it.
"To update firmware in a shipped router, just re-mask the ROM in the field."
You can't re-mask ROM at all — the pattern is etched into silicon geometry at the factory and is permanent. Field-updatable firmware needs EEPROM or Flash.
"EPROM erases when you send it a reverse electric field, byte by byte."
That describes EEPROM (figure 4, middle). EPROM erases via UV photons giving trapped electrons enough energy to escape, and it wipes the whole chip, not per byte.
"PROM is reprogrammable a few hundred times, which is why it's cheaper than EEPROM."
PROM is One-Time Programmable: burning a fuse is irreversible, so it programs exactly once. The "hundreds of writes" figure belongs to EPROM.
"A blown fuse in PROM can be re-connected by pushing current the other way."
A melted fuse is physically severed and cannot be restored by any current direction. A wrong burn means the chip is scrapped.
"Mask ROM is the most expensive per unit because it's permanent."
Backwards — Mask ROM has the lowest cost per bit at high volume. The big mask cost is one-time and amortizes over millions of identical chips; permanence has nothing to do with per-unit price.
"EEPROM writes are cheap on the oxide, so wear leveling is pointless."
Every write degrades the oxide; concentrating writes on one cell burns it out early. Wear leveling spreads writes across many cells to multiply total tolerable writes — it is precisely what saves finite endurance.
"The floating gate is connected to the control gate by a thin wire, which is why charge stays."
The floating gate is completely surrounded by insulator (figure 1) — it is electrically isolated, not wired. That isolation is exactly why the injected electrons are trapped with power off.
Answer with the mechanism or trade-off, not just a label.
Why does a computer need non-volatile memory at all if RAM is faster?
RAM is volatile — it forgets on power-off, so on cold boot there'd be nothing to tell the CPU how to start. Boot code and hardware setup live in non-volatile ROM-family memory. See Memory Hierarchy and Boot Firmware and BIOS.
Why does trapped charge on a floating gate survive for ~10 years but not forever?
Electrons escape only by slow quantum tunneling through the oxide, and that leakage is exponentially small (figure 3) — but nonzero, so charge decays extremely slowly over years rather than instantly.
Why is the leakage current in the retention formula exponential rather than linear in oxide thickness?
An electron's wavefunction decays exponentially inside the forbidden (insulating) region (figure 3, left), so the tunneling escape probability shrinks exponentially with barrier width tox. This is the Fowler–Nordheim / WKB result. See Fowler–Nordheim Tunneling.
Why does trapping charge on the floating gate actually change the stored bit?
The trapped electrons shift the transistor's threshold voltage Vth (figure 2), so at the fixed read voltage the cell either conducts or not — that on/off distinction is the 0 or 1. See MOSFET and Threshold Voltage.
Why did engineers invent EPROM and later EEPROM instead of sticking with PROM?
PROM's one-time fuse means a single mistake wastes the chip and no updates are possible. EPROM added rewritability (via UV), and EEPROM removed the UV/removal hassle by erasing electrically in-circuit.
Why is Mask ROM immune to corruption by rogue writes while EEPROM is not?
Mask ROM's bits are physical silicon geometry — no write path exists to alter them. EEPROM has an electrical write mechanism, so buggy or malicious code can overwrite (and wear) it.
Why does Flash erase in blocks while EEPROM erases per byte, if both are floating-gate memory?
Per-byte erase needs extra control transistors per cell, costing area (figure 4). Flash drops that per-byte circuitry and erases whole blocks, trading fine granularity for much higher density and lower cost/bit.
Boundary and degenerate scenarios — the ones the topic quietly assumes away.
What happens if you leave an EPROM's quartz window exposed to normal room sunlight for years?
Sunlight contains UV, which can slowly leak charge off the floating gates and corrupt data — which is why EPROM windows are covered with an opaque sticker after programming.
You program a PROM but burn zero fuses — what's stored?
The blank/erased pattern (all fuses intact = one uniform logic value). A PROM with nothing burned reads as its default all-ones (or all-zeros) state, not random data.
An EEPROM cell has been written exactly to its rated endurance limit — is the next write guaranteed to fail?
Not guaranteed at the exact cycle; the rating is a reliability specification, not a hard cliff. Failure probability rises sharply past the limit, so designs treat it as the safe boundary, not a promise.
If two ROM cells at a crossing both have transistors placed, can they store different bits?
No — in Mask ROM the presence vs absence of a transistor encodes the bit, so identical placement gives identical stored values at those crossings.
Can you rewrite just one byte of an EPROM without a UV lamp, the way EEPROM allows?
No. EPROM has no electrical erase; without erasing you can only push cells further in one direction, never selectively reset a single byte. Selective per-byte rewrite is exclusive to EEPROM.
What does "in-circuit rewrite" buy you that EPROM's workflow cannot?
It lets firmware update itself while soldered on the running board — no chip removal, no UV lamp, no downtime — enabling field updates like calibration constants and firmware patches.
Recall One-line self-check (map each to its figure)
Give the single distinguishing feature of each member in five words or fewer.
ROM ::: factory-masked, never rewritable.
PROM ::: user-burned fuse, one time only.
EPROM ::: UV-erased, whole chip (figure 4 left).
EEPROM ::: electrically erased, per byte (figure 4 middle).
Flash ::: electrically erased, per block (figure 4 right).
