Exercises — ROM, PROM, EPROM, EEPROM

(a) ROM (Mask ROM) — pattern is etched by a photomask, part of the chip geometry. (b) PROM — One-Time Programmable; melting a fuse is irreversible. (c) EPROM — UV photons kick trapped electrons off the floating gate; whole chip erases. (d) EEPROM — a reverse electric field tunnels electrons off selected cells.

EPROM = whole chip. EEPROM = byte. Flash = large block (essentially block-erasable EEPROM optimised for density).

Step 1 — writes per day. One write per 10 s. $r=\frac{60\times 60\times 24}{10}=8640\text{ writes/day}.$ Why: endurance is counted in cycles, so convert time to writes. Step 2 — lifetime. $T_{\text{life}}=\frac{10^5}{8640}\approx 11.57\text{ days}.$ The cell dies in under 12 days — hammering one location is deadly.

Effective cycles: $C_{\text{eff}}=512\times 10^5=5.12\times 10^7$. Writes per year: $r=8640\times 365=3,153,600\approx 3.1536\times 10^6$. Why convert to a per-year rate: the effective endurance is a fixed number of writes, and we want the answer in years, so we must express the write rate in the same time unit (writes/year) before dividing. Lifetime: $T_{\text{life}}=\frac{5.12\times 10^7}{3.1536\times 10^6}\approx 16.24\text{ years}.$ Rotating the target byte over 512 cells buys ~16 years from a cell that alone lasted 12 days.

Mask ROM total: 40{,}000 + 10^7 \times 0.05 = 40{,}000 + 500{,}000 = \540{,}000$.\ast \ast EEPROMtotal:\ast \ast$10^7 \times 0.55 = $5{,}500{,}000$.\ast \ast Difference:\ast \ast$5{,}500{,}000 - 540{,}000 = $4{,}960{,}000$ cheaper with Mask ROM. Why Mask ROM here: the huge fixed mask cost is dwarfed by the tiny per-unit cost at 10-million volume, and immutable firmware is exactly what's wanted.

Set totals equal: $40,000+0.05V=0.55V\Rightarrow 40,000=0.50V\Rightarrow V=80,000\text{ units}.$ Below 80,000 units EEPROM (no mask charge) wins; above it, Mask ROM wins.

(i) Boot firmware → Mask ROM: fixed, cannot be corrupted by a stray write, and cheapest at volume. See Boot Firmware and BIOS. (ii) Calibration constants → EEPROM: rewritten in-circuit, per-byte, only a few times/year — well within the $10^4$–$10^6$ endurance. UV-erase EPROM is impossible in the field. (iii) Live readings → RAM (SRAM/DRAM): needs fast, unlimited overwrites; volatility is fine because readings are transient. See RAM (SRAM, DRAM) and Volatile vs Non-Volatile Memory.

Total writes over 10 years: $W=1\times 60\times 24\times 365\times 10=5,256,000\text{ writes}.$ Requirement: $C_{\text{eff}}=N\cdot 10^5\ge W$. $N\ge \frac{5,256,000}{10^5}=52.56\Rightarrow N=53\text{ bytes (round up)}.$ You need at least 53 rotating byte-locations. Rounding up matters: 52 bytes would fall just short.

Step 1 — retention vs leakage. Retention $\tau \propto 1/I_{\text{leak}}\propto \exp (+\alpha t_{ox})$. Why the inverse: the stored charge sets the threshold voltage; the cell "remembers" until that charge has leaked away. A larger leakage current $I_{\text{leak}}$ drains the charge faster, so it takes less time — retention (the time to fail) is therefore inversely proportional to the drain rate $I_{\text{leak}}$. Step 2 — ratio of the two thicknesses. $\frac{{\tau }_{\text{new}}}{{\tau }_{\text{old}}}=\frac{\exp (\alpha \cdot 0.9t_0)}{\exp (\alpha t_0)}=\exp (\alpha t_0(0.9-1))=\exp (-0.1\times 30)=e^{-3}.$ Why the ratio: the proportionality constant cancels, so only the thickness change matters. Step 3 — new retention. ${\tau }_{\text{new}}=10\text{ yr}\times e^{-3}\approx 10\times 0.0498\approx 0.498\text{ years}\approx 6\text{ months}.$ Punchline: a mere 10% thinner oxide slashes retention from 10 years to ~6 months — because the dependence is exponential. This is why shrinking non-volatile cells is physically brutal.

(a) EEPROM: an erase is charged only to the byte being rewritten. That cell sees its own 200 rewrites $\Rightarrow$ 200 erase cycles. Comfortably under $10^5$. (b) Naive Flash: every single-byte write anywhere in the block forces a full-block erase, and that erase hits our cell too. $\text{erases on our cell}=\underset{\text{bytes in block}}{\underbrace{4096}}\times \underset{\text{rewrites each}}{\underbrace{200}}=819,200\text{ cycles}.$ That is $819,200>10^5$ — the cell is worn out roughly 8× over. This blow-up factor, $\text{write amplification}=\frac{819,200}{200}=4096,$ equals the block size in bytes: each logical byte-write costs the cell a full-block erase. This is precisely why Flash needs aggressive wear leveling while byte-erasable EEPROM does not. See Flash Memory.

Why does a 10% thinner oxide cause a ~20x retention loss? ::: Because leakage is exponential in thickness, $I\propto e^{-\alpha t_{ox}}$, so a small thickness change is amplified. Below what router volume does EEPROM beat Mask ROM at the given prices? ::: Below 80,000 units. Minimum wear-level byte count for 1 write/min over 10 years at $10^5$ cycles? ::: 53 bytes. How many erase cycles does one Flash cell endure if all 4096 bytes in its block are rewritten 200 times? ::: 819,200 — the block size times the rewrites, showing write amplification.