Row - column addressing and sense amplifiers: Foundations

This page assumes you know nothing. We build every symbol the parent note Row/Column Addressing and Sense Amplifiers uses, one at a time, each on top of the last. Read top to bottom.

1. A bit — the thing being stored

Picture it: a single light switch. Up = 1, down = 0. A memory chip is a wall of a billion such switches.

Why the topic needs it: the entire chip exists to hold, find, and read billions of these. If you don't have "1 of 2 states" firmly in mind, "storing a bit as charge on a capacitor" means nothing.

2. Counting things: $N$ , $R$ , $C$

Picture it: a stadium seating chart. $R$ rows going up, $C$ seats across each row, and $N = R \times C$ total seats.

Why the topic needs it: the parent note's single biggest idea — "arrange cells in a 2D grid" — is this one multiplication. A billion bits laid in a line needs a billion wires; folded into a grid, it needs far fewer (Section 5 shows why).

3. Powers of two: $2^{n}$ and what " $2^{30}$ " means

Picture it: a folding sheet of paper. Fold once → 2 layers. Fold again → 4. Each fold doubles. After $n$ folds you have $2^{n}$ layers.

Why the topic needs it: "a 1 Gbit DRAM is $2^{30}$ cells" and " $R = C = 2^{10}$ " are pure powers of two. Every size in the topic is written this way.

4. Undoing a power: the logarithm $lo g_{2}$

Section 3 asked "if I have $n$ wires, how many things can I name?" — answer $2^{n}$ . Now flip the question: "I want to name $N$ things — how many wires do I need?" That reverse question is exactly what $lo g_{2}$ answers.

Why this tool and not division or subtraction? Because the growth we're undoing is doubling, not adding. Division undoes multiplication; $lo g_{2}$ is the only operation that undoes repeated doubling. Choosing the wrong inverse would give nonsense counts.

Why the topic needs it: the parent's headline result, $address pins = lo g_{2} N$ , is this definition. If $lo g_{2}$ is fuzzy, the whole "why memory is buildable" argument collapses.

5. Rows, columns, wordlines, bitlines

Now we name the wires of the grid.

Picture it: wordline = the corridor light for one whole row of apartments (turns them all "on"). Bitline = the single mail chute that every apartment in a column drops its letter into. A specific apartment is reached only when its corridor light is on and you read its column's chute.

Why the topic needs it: "select cell $(r, c)$ " is literally "raise wordline $r$ , read bitline $c$ ". These two wire types are the physical meaning of a (row, column) address.

6. The decoder — turning a number into a chosen wire

Picture it: you type "seat 5" on a keypad; a machine lights up seat 5's lamp and no other. $n$ input buttons, but $2^{n}$ lamps.

This is the marriage of Sections 3 and 4: the decoder is the physical machine that turns $n$ address bits into a choice among $2^{n}$ lines. See Address decoders and multiplexers for the internal gate logic.

Why the topic needs it: the parent's "row decoder raises exactly one wordline" is this exact device. It is why $n$ pins can address $2^{n}$ rows — the whole pin-saving trick.

7. Charge, capacitance, voltage: $Q$ , $C_{s}$ , $C_{b}$ , $V$

A DRAM bit is not a switch — it is a bucket of charge. To read it we need three linked ideas.

Two specific buckets appear in the topic:

$C_{s}$ = the storage cell's capacitance — a thimble, deliberately tiny (small = more fit on the chip). See DRAM cell structure (1T1C).
$C_{b}$ = the bitline's capacitance — a bathtub, because the wire is long and touches many cells. Usually $C_{b} \approx 10 - 30 \times C_{s}$ .

Why do we need $Q = C V$ specifically? Because the read works by conserving charge: when the thimble empties into the bathtub, total $Q$ is unchanged but the level $V$ readjusts. The only tool that connects "charge that survives" to "voltage we measure" is $Q = C V$ . No other relation lets us predict the new level.

Why the topic needs it: the sense-voltage derivation is nothing but $Q = C V$ applied before and after two buckets merge. Master this picture and that derivation becomes obvious.

8. Supply voltage and mid-rail: $V_{D D}$ and $V_{D D} /2$

Picture it: a water tank. Full = 1, empty = 0. Before reading we set the bitline half-full, so a stored 1 nudges the level up and a stored 0 nudges it down — a symmetric wiggle either way from the middle.

Why the topic needs it: precharging to $V_{D D} /2$ is why the read signal is symmetric ( $+ Δ V$ for a 1, $- Δ V$ for a 0). Starting at $V_{D D}$ instead would ruin that symmetry (a mistake the parent warns about).

9. The change symbol $Δ V$

Picture it: the bitline sits at mid-rail; after the cell dumps its charge, the level shifts a hair. $Δ V$ is the size of that shift — a few tens of millivolts, a whisper.

Why the topic needs it: $Δ V$ is the star quantity — the tiny signal the sense amplifier must catch and blow up to a full 1 or 0.

10. Millivolts: mV, and "fF"

Why the topic needs it: the answer " $Δ V \approx 55$ mV" only lands as "shockingly tiny, hence a sense amp is mandatory" once you feel how small a millivolt is compared to a full 1200 mV logic level.

11. RAS and CAS — reusing pins in time

Picture it: one narrow doorway used twice. First you shout "ROW!" and send the row number through; then you shout "COLUMN!" and send the column number through the same doorway. Same pins, two turns — half the doorways needed. More on this in CAS latency and memory timing.

Why the topic needs it: this time-sharing is why a square array needs only $\frac{1}{2} lo g_{2} N$ address pins instead of $lo g_{2} N$ .

How it all feeds the topic

Left branch = finding the bit (grid, powers of two, logs, decoders, RAS/CAS). Right branch = reading the bit ( $Q = C V$ , tiny cell, mid-rail, $Δ V$ , sense amp). Both meet at the topic.

Equipment checklist

Self-test: cover the right side and answer aloud.

What is a bit, physically, in DRAM?

A tiny amount of charge on a capacitor — present (1) or absent (0).

If a grid has

R

rows and

C

columns, how many bits total?

N = R \times C

What does

2^{n}

count, and what does each extra wire do?

The number of distinct things

n

bits can name; each wire doubles it.

What question does

lo g_{2} N

answer?

"2 to the what power gives

N

?" — i.e. how many bits/pins are needed to name

N

things.

Which wire is horizontal and turns on a whole row?

The wordline.

Which wire is vertical and carries data for a column?

The bitline.

What does a decoder do with an

n

-bit address?

Raises exactly one of its

2^{n}

output lines.

State the equation linking charge, capacitance, voltage.

Q = C \times V

Which is bigger,

C_{s}

C_{b}

, and why?

C_{b}

(the long bitline) is much bigger —

10

–

30 \times

; the cell

C_{s}

is kept tiny for density.

Why precharge the bitline to

V_{D D} /2

instead of

V_{D D}

So a stored 1 pushes voltage up and a stored 0 pushes it down — a symmetric

\pm Δ V

signal.

What does

Δ V

represent here?

The tiny voltage shift on the bitline caused by the cell — the signal the sense amp amplifies.

What do RAS and CAS let the chip reuse?

The same address pins — sent as a row address first, then a column address.