Visual walkthrough — DRAM 1T1C cell structure

This is the visual companion to the parent 1T1C note. Prerequisite ideas we lean on: Capacitor Q=CV, Bitline and Wordline Architecture, and Charge Sharing.

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Step 1 — What is charge on a capacitor, in a picture?

WHAT. A capacitor is two metal plates with a gap. Push electric charge onto one plate and it sits there, held by the pull of the opposite plate. We measure how much charge with the letter $Q$ (units: coulombs, C — a count of electricity).

WHY this first. The whole DRAM bit is charge sitting on a plate. Before we can move charge around, we must agree what "amount of charge" and "voltage" mean and how they link.

The link is the defining law of a capacitor: $Q=C\cdot V$

• $Q$ — the amount of charge stored (how full the cup is).
• $V$ — the voltage, the electrical "pressure" or water-level across the plates. Higher $V$ = higher water.
• $C$ — the capacitance, how wide the cup is: how many coulombs you must pour in to raise the level by one volt. Units: farads (F). Our cups are tiny — femtofarads, $1\text{ fF}=10^{-15}\text{ F}$.

PICTURE. A narrow cup ($C_s$, small) and a wide tank ($C_{BL}$, large) at the same water level $V$ hold very different amounts $Q$ — the wide one holds far more, because $Q=C\cdot V$ and its $C$ is bigger.

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Step 2 — The two cups before we connect them

WHAT. In a real read there are exactly two capacitors in play:

• the storage cell $C_s$ (tiny, ~$20\text{ fF}$), holding the bit, sitting at some voltage $V_{cell}$;
• the bitline $C_{BL}$ (big, ~$200\text{ fF}$) — the long wire running past many cells; it has capacitance just from being a long metal line.

WHY. Reading = connecting these two. To predict the result we need each cup's starting charge. So we snapshot both before the tap opens.

Before connecting, using $Q=CV$ on each cup separately: $Q_{cell}^{\text{before}}=C_s{V}_{cell},Q_{BL}^{\text{before}}=C_{BL}\frac{V_{DD}}{2}$

• $C_s{V}_{cell}$ — charge in the small cup. $V_{cell}$ is near $V_{DD}$ for a "1", near $0$ for a "0".
• $C_{BL}\frac{V_{DD}}{2}$ — charge on the bitline. Why $\frac{V_{DD}}{2}$? We deliberately precharge the bitline to the halfway voltage before every read, so a "1" can push it up and a "0" can pull it down — symmetric either way (we return to this in Step 7).

PICTURE. Two separate, sealed cups side by side at different levels. No pipe between them yet — the transistor tap is closed. Charge on each is the shaded area.

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Step 3 — Open the tap: the one law that governs everything

WHAT. Raising the wordline (WL) turns the access transistor on — it becomes a wire connecting cell and bitline. Now charge can flow between the two cups until their levels equalise to one common voltage we call $V_{final}$.

WHY charge conservation, and not something fancier? The transistor neither creates nor destroys charge — it only connects. So the total charge in the system is exactly the same one instant after opening the tap as one instant before. That single fact, "charge in = charge out", is strong enough to give us the answer with no calculus, no circuit theory. It is the cleanest possible tool for the job.

$\underset{\text{total charge BEFORE}}{\underbrace{C_s{V}_{cell}+C_{BL}\frac{V_{DD}}{2}}}=\underset{\text{total charge AFTER}}{\underbrace{(C_s+C_{BL})V_{final}}}$

• Left side — the two separate charges from Step 2, added.
• Right side — after equalising, both cups share the same level $V_{final}$. Their combined capacitance is $C_s+C_{BL}$ (two cups joined behave like one wider cup), so the total charge is (combined width) × (common level).

PICTURE. Water sloshes through the open pipe. The tiny cup's high level drops a little; the huge tank's level barely rises. They meet at one flat surface $V_{final}$.

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Step 4 — Solve for the shared level $V_{final}$

WHAT. We rearrange the conservation equation to isolate $V_{final}$.

WHY. $V_{final}$ is the voltage the bitline actually ends up at — the thing the sense amplifier will look at. Everything downstream depends on it.

Divide both sides by $(C_s+C_{BL})$: $V_{final}=\frac{C_s{V}_{cell}+C_{BL}\frac{V_{DD}}{2}}{C_s+C_{BL}}$

Read this as a weighted average of the two starting levels:

• $V_{cell}$ is weighted by $C_s$ (small weight → little influence);
• $\frac{V_{DD}}{2}$ is weighted by $C_{BL}$ (big weight → dominates).

So $V_{final}$ lands very close to $\frac{V_{DD}}{2}$, only dragged a hair toward $V_{cell}$. That "hair" is the whole signal.

PICTURE. A see-saw / weighted-average bar: the final level pin sits almost on top of the heavy $C_{BL}$ side, tugged only slightly toward the light $C_s$ side.

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Step 5 — Subtract the reference: the signal swing $\Delta V$

WHAT. The sense amp does not care about the absolute voltage — it cares how far the bitline moved away from its precharge reference $\frac{V_{DD}}{2}$. Call that displacement $\Delta V$ (the Greek delta means "change in").

WHY subtract $\frac{V_{DD}}{2}$? Because "up from half" means "1" and "down from half" means "0". The sign and size of the move is the readout, not the level itself.

$\Delta V=V_{final}-\frac{V_{DD}}{2}=\frac{C_s{V}_{cell}+C_{BL}\frac{V_{DD}}{2}}{C_s+C_{BL}}-\frac{V_{DD}}{2}$

Put the $\frac{V_{DD}}{2}$ over the common denominator and simplify. The $C_{BL}\frac{V_{DD}}{2}$ terms cancel: $\Delta V=\frac{C_s{V}_{cell}+C_{BL}\frac{V_{DD}}{2}-(C_s+C_{BL})\frac{V_{DD}}{2}}{C_s+C_{BL}}=\frac{C_s\left(V_{cell}-\frac{V_{DD}}{2}\right)}{C_s+C_{BL}}$

$\boxed{\Delta V=\frac{C_s}{C_s+C_{BL}}\left(V_{cell}-\frac{V_{DD}}{2}\right)}$

• $\frac{C_s}{C_s+C_{BL}}$ — the dilution factor. With $C_s=20$, $C_{BL}=200$ this is $\frac{20}{220}\approx 0.09$: barely 9% survives.
• $\left(V_{cell}-\frac{V_{DD}}{2}\right)$ — how far the cell started from the reference. For a "1" this is positive; for a "0" it is negative.

PICTURE. A big arrow (the cell's original distance from half) shrinking down to a tiny arrow (the actual bitline swing) as it passes through the $\times \frac{C_s}{C_s+C_{BL}}$ "attenuator".

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Step 6 — Plug in numbers: how tiny is tiny?

WHAT. Use the parent note's values: $C_s=20\text{ fF}$, $C_{BL}=200\text{ fF}$, $V_{DD}=1.2\text{ V}$.

For a stored "1" ($V_{cell}=1.2$): $\Delta V=\frac{20}{220}\left(1.2-0.6\right)=0.0909\times 0.6\approx 0.0545\text{ V}=54.5\text{ mV}$

WHY it matters. The bitline moved up by only about 55 thousandths of a volt — far too faint to call a "1" reliably on its own. This tiny number is the entire justification for Sense Amplifiers: something must blow $55\text{ mV}$ back up to a full $1.2\text{ V}$.

PICTURE. A voltage axis with the $V_{DD}/2=0.6\text{ V}$ reference line and a barely-taller mark at $0.6545\text{ V}$ — the reader should feel how small $55\text{ mV}$ is next to $1.2\text{ V}$.

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Step 7 — All the cases: "1", "0", and the degenerate ones

WHAT. One formula must cover every scenario. Let us walk them so no read surprises you.

Case A — stored "1" ($V_{cell}=V_{DD}=1.2$): $V_{cell}-\frac{V_{DD}}{2}=+0.6>0$, so $\Delta V>0$. Bitline swings up. → sense amp reads 1.

Case B — stored "0" ($V_{cell}=0$): $V_{cell}-\frac{V_{DD}}{2}=-0.6<0$, so $\Delta V=-54.5\text{ mV}$. Bitline swings down. → sense amp reads 0. This is why we precharged to the middle: "1" and "0" push in opposite directions with equal magnitude, symmetric around the reference.

Case C — degenerate: what if $C_{BL}=0$? (an imaginary bitline with no wire capacitance). Then $\frac{C_s}{C_s+0}=1$ and $\Delta V=V_{cell}-\frac{V_{DD}}{2}$ — the full cell voltage transfers, no dilution. This confirms the dilution factor is entirely the bitline's fault.

Case D — degenerate: what if $C_{BL}\to \infty$? (an infinitely long wire). Then $\frac{C_s}{C_s+C_{BL}}\to 0$ and $\Delta V\to 0$ — the cell is swallowed without a trace, unreadable. This is the design limit: keep bitlines short so $C_{BL}$ never dwarfs $C_s$ too badly.

Case E — the read is destructive. After equalising, the cell no longer sits at $V_{cell}$; it now sits at $V_{final}\approx \frac{V_{DD}}{2}$, diluted toward the middle. The original bit is gone. The sense amp must therefore rewrite it — see DRAM Refresh.

PICTURE. A single voltage axis showing the precharge line, an up-swing (1, green), a down-swing (0, red), and faint dashed extremes for $C_{BL}\to 0$ (huge swing) and $C_{BL}\to \infty$ (zero swing).

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The one-picture summary

Below: the small cup's tall-but-thin charge pours through the transistor into the wide bitline tank. Levels equalise at $V_{final}$, a weighted average pinned near $\frac{V_{DD}}{2}$. The bitline's rise above the reference is the tiny $\Delta V=\frac{C_s}{C_s+C_{BL}}(V_{cell}-\frac{V_{DD}}{2})$ — the signal the sense amp must rescue.

Recall Feynman: the whole walkthrough in plain words

Picture a thimble of water (the cell) sitting high, and a big bathtub (the bitline) filled to exactly half. We open a little tap between them. Water can't appear or vanish, so whatever leaves the thimble enters the tub — that's the ONE rule (charge conservation). Because the tub is huge, the thimble's water barely raises it: the shared final level is almost exactly the tub's old half-full level, tugged up by only a hair. That "hair" — about 55 thousandths of a volt in real numbers — is the entire signal that says "the thimble was full, this was a 1." If the thimble had been empty (a 0), the tub level dips a hair below half instead. We started the tub at exactly half so full and empty push it opposite ways by equal amounts. A super-sensitive gauge (the sense amp) then blows that hair back up to a clear full/empty answer — and refills the spilled thimble, because opening the tap ruined the original.

Recall

Which law alone gives the whole derivation? ::: Charge conservation — total charge before connecting equals total charge after. In the weighted average $V_{final}$, which cup dominates and why? ::: The bitline $C_{BL}$, because it has the larger capacitance (larger weight). What does the dilution factor become if $C_{BL}\to \infty$? ::: It tends to $0$, so $\Delta V\to 0$ — the bit becomes unreadable; keep bitlines short. Sign of $\Delta V$ for a stored "0"? ::: Negative — bitline swings below $V_{DD}/2$. Numeric swing for $C_s=20$ fF, $C_{BL}=200$ fF, $V_{DD}=1.2$ V, reading a "1"? ::: About $+54.5$ mV.

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Connections

• Charge Sharing — the conservation principle this whole page is built on.
• Capacitor Q=CV — the one relation used in Steps 1–2.
• Sense Amplifiers — why the tiny $\Delta V$ needs rescuing.
• Bitline and Wordline Architecture — where $C_{BL}$ comes from and why it's large.
• DRAM Refresh — the write-back that undoes the destructive read (Case E).