3.3.14 · D5Combinational Circuits
Question bank — Hazards (static and dynamic) in combinational logic
Prerequisites worth re-opening if a trap bites: Karnaugh Maps and Prime Implicants, Consensus Theorem and Redundancy, Propagation Delay and Gate Timing, Sum of Products and Product of Sums Forms, Synchronous vs Asynchronous Circuits, Metastability and Setup-Hold Time.
Before you start — the three definitions on one card
You cannot classify a trap without the three shapes fixed in your head. Here they are, stated crisply and then drawn so you can see what "glitch" actually means on a wire over time.
What is a "consensus term"? (inline refresher)
Since half the traps hinge on it, here is the idea built from scratch — you should not need to leave the page.
One more edge case up front — inertial vs transport delay
True or false — justify
A hazard means the combinational circuit computes the wrong Boolean function.
False. The steady-state output is always correct; a hazard is a transient glitch during the transition caused by unequal path delays, not a logic error.
A circuit with zero gate delay (an ideal model) can still have a hazard.
False. Hazards exist only because real gates take time. If every gate switched instantly, the two reconvergent paths would agree at every instant and no glitch could form.
Every static-1 hazard is a sequence, and every static-0 hazard is .
True. You name the hazard by the value the output is supposed to hold: holding but dipping is static-1; holding but spiking is static-0.
If the initial and final output values differ, you cannot have a static hazard.
True. A static hazard requires initial = final (the output "should stay put"). Differing endpoints mean a genuine transition, which is the territory of dynamic hazards.
Adding the consensus term to changes the truth table.
False. is logically redundant — the function is identical at every input. It only alters timing behaviour, holding the output steady during the transition.
A dynamic hazard can be produced by a two-path (single-inverter) circuit.
False. Dynamic hazards require three or more reconvergent paths of differing delay so the output can be toggled multiple times; two paths give at most one spike (static).
Registering a combinational output with a flip-flop makes the circuit hazard-free.
False. The glitch still occurs inside the combinational logic; the flip-flop merely ignores it if you sample after everything settles (see Metastability and Setup-Hold Time).
A hazard-free two-level SOP always has more product terms than the minimal SOP.
True (or equal). You keep every essential prime implicant plus the consensus terms needed to bridge adjacent 1s, so the cover can only grow, never shrink, relative to the minimum.
The number of extra output transitions (actual minus ideal) in any hazard is always even.
True. Every glitch is a there-and-back spike/dip that adds transitions in pairs (+2), so the parity of the net change is preserved — static keeps ideal-count , dynamic keeps ideal-count .
Consensus terms are only relevant when the input variable that is both true and complemented actually changes.
True. The consensus of and covers the handoff for the variable ; if is held fixed and something else changes, that particular consensus term is irrelevant to that transition.
An inertial-delay gate guarantees the glitch never leaves the circuit.
False. It only rejects pulses narrower than its own delay; a wider glitch, or a change in operating conditions that widens it, passes straight through. Inertial rejection is a lucky side-effect, not a fix.
Spot the error
" and are equal, so the gate is wasted silicon — delete it."
The error is treating steady-state equality as the whole story. is essential during the transition to hold the output at ; deleting it re-opens the static-1 glitch.
"This function has a static-1 hazard, so I'll add the consensus sum factor to fix it."
Wrong form. Static-1 hazards live in SOP and are cured by a consensus product term (like ). The consensus sum factor is the POS cure for a static-0 hazard.
"Two adjacent 1-cells on a K-map always signal a static-1 hazard."
Only if they lie in different prime implicants with no single implicant covering both. If one implicant already spans both cells, there's no handoff and no hazard.
"The output glitched three times, but the initial and final values are the same, so it's a dynamic hazard."
If initial = final, the net transitions are even and the sequence like is still a static hazard (repeated static glitch). Dynamic hazards have initial final with an odd () count.
"I added a consensus term, so my multi-level circuit is now free of dynamic hazards too."
A single consensus term fixes a static handoff; it does not guarantee monotonic switching through reconvergent paths. Dynamic hazards need the whole multi-level network redesigned (or flattened to hazard-free two-level).
"Static-0 and static-1 are the same phenomenon, just drawn upside down, so the SOP fix works for both."
They are duals, not identical in implementation. The SOP consensus product cures static-1; the static-0 cure lives in POS as a consensus sum factor — you must respect the form.
"Since the glitch lasts only one gate-delay, it can never cause a real failure."
In synchronous logic sampled after settling, maybe. But in asynchronous logic, latch enables, clock lines, or combinational feedback, even a one-delay spike can trigger a false latch or oscillation.
"The simulator used inertial delay and showed no glitch, so my silicon is safe."
Inertial simulation may swallow a narrow pulse that transport-delay analysis (and real corner conditions) would keep. Sign off on hazard-freedom by design (consensus coverage), not by a delay model that happens to hide it.
Why questions
Why is the classic hazard culprit "an input feeding both a gate directly and through an inverter"?
Because the inverter adds a delay, so for one gate-delay window the circuit simultaneously sees the old value on the direct path and the new value (as ) on the delayed path — the two disagree and the output dips or spikes.
Why does adding a redundant term help even though it "does nothing" logically?
During the transition, the two original terms are momentarily both (or both ). The redundant term is designed to stay asserted through that exact window, bridging the gap so the output never drops.
Why do dynamic hazards need at least three reconvergent paths, not two?
Two arrivals can produce at most one spike (a single up-then-down or down-then-up = static). To toggle the output past the final value and back again — three or more actual switches — you need at least three staggered arrival times.
Why can't Boolean simplification tools guarantee hazard-free logic by default?
They optimise for the minimal cover at steady state and deliberately remove redundant (consensus) terms — the very terms that suppress glitches. Minimality and hazard-freedom pull in opposite directions.
Why is a hazard a timing problem and not a logic problem?
Because the same netlist gives the correct output once signals settle; the glitch exists only in the finite window where path delays differ. Change the delays (or add covering terms) and the logic is untouched but the glitch vanishes.
Why does parity of transitions matter when classifying a hazard?
Because every glitch adds transitions in pairs, the net (ideal) change equals the intended change. Even net (0) → static; odd net (1) with extra wobble → dynamic. Counting parity tells you which family you're in.
Why does the consensus term correspond to a K-map ring that overlaps both original rings?
Because deleting the clashing variable leaves the ring free to span both and cells for ; geometrically that is one bigger group sitting on top of the handoff seam.
Edge cases
If the changing input reaches the output through two paths of exactly equal delay, is there a hazard?
No. The old and new values arrive simultaneously, so there is no window where the paths disagree — the glitch condition never opens. (In practice, exact equality is fragile; see Propagation Delay and Gate Timing.)
What happens if a static-1 and a static-0 hazard could both occur for the same variable transition?
They can't for a single transition of one variable: the output either holds (only a dip is possible) or holds (only a spike). The direction of the possible glitch is fixed by the value being held.
Can a hazard occur if two inputs change at the same instant?
The standard theory assumes a single input change; simultaneous multi-input changes can create function hazards that consensus terms cannot fix — you must restrict inputs to change one at a time or redesign entirely.
Is a circuit with a single AND gate and a single OR gate (no inverters, no reconvergence) ever hazardous?
No. With no reconvergent paths carrying both a signal and its complement, there is no unequal-delay disagreement to produce a glitch — the hazard mechanism is simply absent.
What is the limiting behaviour of the glitch width as the inverter delay shrinks toward zero?
The glitch narrows to zero width and disappears — confirming the hazard is purely a delay artifact. A wider inverter delay widens the glitch, making it more likely to be latched (or, under inertial delay, more likely to survive rejection).
If every pair of adjacent 1-cells on the K-map is already covered by a common prime implicant, what does that imply?
The two-level SOP is statically hazard-free for all single-input changes — no handoff ever occurs, so no consensus term needs adding.
Under a pure inertial-delay model with a very large gate delay, what happens to short hazards?
They are rejected (swallowed) because they are narrower than the gate delay, so they never appear downstream — but this masking is model- and condition-dependent and must not be relied on for correctness.
Recall Quick self-check before you leave
Name the four traps this page kept hammering ::: (1) hazard = timing not logic, (2) consensus is "redundant" only at steady state, (3) static-1/SOP vs static-0/POS duality, (4) consensus does not cure dynamic hazards.
Recall Consensus in one breath
Consensus of and ::: Delete the clashing variable , AND the leftovers and → ; it wraps both K-map cells so coverage never hands off.