Intuition The one-line ideaAn instruction like ADD R1, X is useless until the CPU knows where to find the operand X . An addressing mode rule the CPU uses to compute the actual location (the "effective address") of an operand from the bits encoded in the instruction. Different modes trade flexibility against speed and instruction size .
A CPU has very few hardware locations (registers) but programs touch millions of memory cells, arrays, structs, and constants. We cannot give every memory cell its own opcode. So we encode a small "recipe" in the instruction, and let hardware compute the location each time it runs. This buys us:
Constants without a memory access (immediate).Fast scratch values (register).Pointers / linked structures (indirect).Arrays / loops without rewriting the instruction (indexed).
The central object every mode produces is the Effective Address (EA) : the final memory address from which the operand is fetched (or written).
Operand = Memory [ EA ] (except when no memory access is needed) \text{Operand} = \text{Memory}[\text{EA}] \quad \text{(except when no memory access is needed)} Operand = Memory [ EA ] (except when no memory access is needed)
Definition Immediate modeThe operand is the data itself , sitting inside the instruction. No memory or register lookup.
Operand = Value field of instruction \text{Operand} = \text{Value field of instruction} Operand = Value field of instruction constants (MOV R1, #5).
The instruction names a register ; the operand is in that register.
Operand = R [ i ] ( EA is a register number, not a memory address ) \text{Operand} = R[i] \qquad (\text{EA is a register number, not a memory address}) Operand = R [ i ] ( EA is a register number, not a memory address ) fast temporaries. No memory access ⇒ fastest after immediate.
Definition Direct (absolute) modeThe instruction holds the actual memory address .
EA = A Operand = M [ A ] \text{EA} = A \qquad \text{Operand} = M[A] EA = A Operand = M [ A ] global variables at fixed addresses.
The instruction holds an address that points to where the real address lives — a pointer.
EA = M [ A ] Operand = M [ M [ A ] ] \text{EA} = M[A] \qquad \text{Operand} = M[\,M[A]\,] EA = M [ A ] Operand = M [ M [ A ] ] EA = R [ i ] \text{EA}=R[i] EA = R [ i ] = M [ R [ i ] ] =M[R[i]] = M [ R [ i ]] pointers , linked lists.
EA = a base address A A A index register R [ i ] R[i] R [ i ] EA = A + R [ i ] Operand = M [ A + R [ i ] ] \text{EA} = A + R[i] \qquad \text{Operand} = M[A + R[i]] EA = A + R [ i ] Operand = M [ A + R [ i ]] arrays . Increment R [ i ] R[i] R [ i ]
Take memory: M[100]=200, M[200]=350, M[204]=999, register R2=4, A=100.
Worked example Immediate:MOV R1, #100
Decode finds mode = immediate. Why? No memory needed; the bits 100 are the data.
R1 ← 100. Done. 0 memory accesses.
LOAD R1, [100]
EA = 100 directly. Why? Direct = address is literal.
R1 ← M[100] = 200. 1 access.
LOAD R1, [[100]]
First read: M[100] = 200. Why? The 100 is a pointer to the address , not the data.
EA = 200. Second read: M[200] = 350.
R1 ← 350. 2 accesses — this is why indirect is slower.
LOAD R1, [100 + R2] with R2=4
EA = 100 + 4 = 104. Why add R2? It selects element R2/elemSize of the array based at 100.
R1 ← M[104] = 999. 1 access. To get next element, do R2 ← R2 + 4 and reuse the same instruction . Why this matters: loops over arrays don't need new code per element.
ADD R1, R2
Both operands are register contents. Why fastest? Registers are inside the CPU; no bus trip.
R1 ← R1 + R2. 0 memory accesses for operands.
Worked example Predict the EAGiven A = 50, M[50] = 80, M[80] = 12, R3 = 7.
Forecast the operand value for each, then check:
Immediate #50 → operand = 50 ✅ (0 accesses)
Direct [50] → operand = M[50] = 80 ✅
Indirect [[50]] → operand = M[M[50]] = M[80] = 12 ✅
Indexed [50 + R3] → operand = M[57] (whatever is stored there) ✅
If your forecast missed indirect, you under-counted a $M[\cdot]$.
Common mistake "Indirect and indexed are basically the same."Why it feels right: both involve "an address plus some lookup," and both are slower than direct.
The fix: Indirect = M [ A ] M[A] M [ A ] extra memory read to fetch the pointer). Indexed = A + R [ i ] A + R[i] A + R [ i ] addition , no extra memory read). Memory access counts differ: indirect = 2, indexed = 1. Indexed walks arrays; indirect follows pointers.
Common mistake "Immediate stores the operand in memory and reads it."Why it feels right: every other mode eventually touches memory.
The fix: Immediate's operand lives inside the instruction word already fetched during instruction fetch. 0 additional operand accesses. That's its whole advantage.
Common mistake "Direct mode is the most flexible because it names the exact address."Why it feels right: "exact address" sounds powerful.
The fix: Naming a fixed address is the least flexible — the instruction can only ever touch that one cell. Indexed/indirect change targets at runtime, which is what loops and pointers need.
Common mistake "Indexed EA = A + the value at A."Why it feels right: mixing it up with indirect.
The fix: Indexed adds the index register's content R [ i ] R[i] R [ i ] not a memory value: EA = A + R [ i ] \text{EA}=A+R[i] EA = A + R [ i ]
Recall Feynman: explain to a 12-year-oldImagine a treasure hunt. An addressing mode is the clue type on each card.
Immediate: the card says "your treasure is the number 5" — the prize is written on the card .Register: "look in your pocket #2" — quick, it's on you.Direct: "go to house number 100" — the address is written plainly.Indirect: "go to house 100, read the note inside, it tells you the real house" — two trips.Indexed: "start at house 100, then walk forward as many houses as your counter says" — perfect for checking a whole street one by one (an array!).
Mnemonic Remember the modes & their memory-access cost"I Realize Doctors Inspect X-rays" → I mmediate, R egister, D irect, I ndirect, inde X — this is just the naming order , NOT a speed ranking.
For the memory-access count (number of memory reads to get the operand) remember the digits 0 0 1 2 1 for (Immediate, Register, Direct, Indirect, Indexed). The slow one is Indirect (2 reads) because it chases a pointer; everyone else needs at most one read.
What is an effective address (EA)? The final memory address of an operand, computed by the CPU from the instruction bits according to the addressing mode.
Immediate mode — where is the operand and how many memory accesses? Inside the instruction word itself; 0 operand memory accesses.
Register mode operand location? In a CPU register
R [ i ] R[i] R [ i ] ; 0 memory accesses (fastest for memory bus).
Direct mode EA formula? EA = A \text{EA}=A EA = A (the literal address in the instruction); operand
= M [ A ] =M[A] = M [ A ] , 1 access.
Indirect mode EA and operand? EA = M [ A ] \text{EA}=M[A] EA = M [ A ] , operand
= M [ M [ A ] ] =M[M[A]] = M [ M [ A ]] ; 2 memory accesses; used for pointers.
Indexed mode EA formula? EA = A + R [ i ] \text{EA}=A+R[i] EA = A + R [ i ] (base + index register); operand
= M [ A + R [ i ] ] =M[A+R[i]] = M [ A + R [ i ]] , 1 access.
Which mode is best for arrays and why? Indexed — increment the index register in a loop to reuse the same instruction for each element.
Which mode is best for pointers / linked lists? Indirect — the instruction holds the address of the address.
Key difference indirect vs indexed? Indirect does an extra MEMORY read (
M [ A ] M[A] M [ A ] , 2 accesses); indexed does an ADDITION (
A + R [ i ] A+R[i] A + R [ i ] , 1 access).
Memory access count to fetch operand for each mode (Imm, Reg, Direct, Indirect, Indexed)? 0, 0, 1, 2, 1.
Why use immediate mode? To supply constants with zero extra memory access (operand pre-fetched with the instruction).
operand in instruction, 0 access
Memory access to fetch operand
Intuition Hinglish mein samjhoDekho, jab CPU koi instruction chalata hai jaise ADD R1, X, toh sabse pehle usko pata karna padta hai ki operand X hai kahan . Yeh "kahan dhoondhna hai" ka rule hi addressing mode kehlata hai. Final jo asli memory location nikalti hai usko Effective Address (EA) bolte hain. Yahi poora khel hai.
Paanch main modes hain. Immediate matlab number instruction ke andar hi likha hai (jaise #5) — zero memory access, sabse fast for constants. Register matlab operand kisi register mein hai (R2 vagairah) — bhi bahut fast, kyunki register CPU ke andar hota hai. Direct matlab instruction mein seedha address likha hai: EA = A, ek memory access. Indirect thoda tricky — instruction jo address deta hai wahan asli address rakha hota hai, yaani pointer: EA = M[A], isliye do memory access lagte hain (slow). Indexed arrays ke liye perfect: EA = A + R[i], base address mein index register add kar dete hain, sirf ek memory access (plus ek chhoti si ALU addition).
Sabse common galti: students indirect aur indexed ko mix kar dete hain. Yaad rakho — indirect mein extra memory read hota hai (M[A]), indexed mein sirf addition hota hai (A + R[i]). Isiliye indirect = 2 memory access, indexed = 1 memory access. Doosri galti: socht lena ki immediate bhi memory se padhta hai — nahi! Immediate ka data instruction ke saath hi aa chuka hota hai, zero extra access.
Yeh kyun important hai? Kyunki real programs mein loops aur arrays hote hain. Agar indexed mode na ho toh har array element ke liye alag instruction likhni padti — bekaar. Aur pointers/linked lists ke liye indirect chahiye. 80/20 funda: bas EA ka formula aur memory-access count yaad rakho (0,0,1,2,1), baaki sab samajh aa jayega.
