Intuition The big picture
The ALU (Arithmetic Logic Unit) is the calculator inside the CPU. It takes two binary numbers, an operation selector , and spits out a result plus four status bits called flags . The flags are the ALU's way of whispering side-information to the rest of the CPU: "the answer was zero", "you ran out of bits", "the signed math overflowed", "the result looks negative".
WHY flags exist: the result alone loses information. If you add two 8-bit numbers and the true answer needs 9 bits, the 8-bit result is wrong — but the carry flag preserves the lost 9th bit so the CPU (or your branch instruction) knows.
A combinational circuit that, given operands A A A , B B B (each n n n bits) and a control code, produces an n n n -bit result R R R and a set of condition flags . "Combinational" = no memory ; output depends only on current inputs.
Definition The four core flags
Zero (Z) — set when the result is all zeros.
Carry (C) — set when an unsigned operation produces a carry-out of the MSB (or a borrow on subtract).
Overflow (V / O) — set when a signed operation gives a result that doesn't fit in n n n bits.
Negative (N / S) — equals the MSB of the result (the sign bit in two's complement).
Intuition WHY two's complement?
We want ONE adder circuit to do both addition and subtraction, and we want x + ( − x ) = 0 x + (-x) = 0 x + ( − x ) = 0 to fall out naturally. Two's complement makes negative numbers wrap around so the same binary addition works for signed and unsigned.
Derivation from first principles. In n n n bits we have 2 n 2^n 2 n patterns. We want − x -x − x to satisfy x + ( − x ) ≡ 0 ( m o d 2 n ) x + (-x) \equiv 0 \pmod{2^n} x + ( − x ) ≡ 0 ( mod 2 n ) . So:
− x ≡ 2 n − x ( m o d 2 n ) -x \equiv 2^n - x \pmod{2^n} − x ≡ 2 n − x ( mod 2 n )
Now 2 n − x = ( 2 n − 1 ) ⏟ all ones − x + 1 = ( ∼ x ) + 1 2^n - x = \underbrace{(2^n - 1)}_{\text{all ones}} - x + 1 = (\sim\! x) + 1 2 n − x = all ones ( 2 n − 1 ) − x + 1 = ( ∼ x ) + 1 .
That's the famous rule: invert all bits and add 1 .
Think of an n n n -bit adder as full-adders chained, each passing a carry. The carry out of the most significant full adder is c o u t c_{out} c o u t .
Intuition WHY carry ≠ overflow
Carry asks "did we exceed the unsigned range?" Overflow asks "did we leave the signed range [ − 2 n − 1 , 2 n − 1 − 1 ] [-2^{n-1}, 2^{n-1}-1] [ − 2 n − 1 , 2 n − 1 − 1 ] ?" These are DIFFERENT questions. Adding two positives can give a "negative" answer — that's signed overflow, even with no carry out.
Derivation. Signed overflow happens iff the carry into the sign bit differs from the carry out of the sign bit:
V = c n ⊕ c n − 1 V = c_{n} \oplus c_{n-1} V = c n ⊕ c n − 1
Equivalently, in terms of sign bits (a a a , b b b = sign of operands, s s s = sign of result), for addition :
V = ( a ∧ b ∧ s ‾ ) ∨ ( a ‾ ∧ b ‾ ∧ s ) V = (a \wedge b \wedge \overline{s}) \vee (\overline{a} \wedge \overline{b} \wedge s) V = ( a ∧ b ∧ s ) ∨ ( a ∧ b ∧ s )
Read it: overflow only when both operands share a sign and the result's sign flips. (pos+pos→neg, or neg+neg→pos). You can never overflow adding numbers of opposite sign.
Worked example Example 1 — clean addition, no flags
A = 0001 0010 ( 18 ) A = 0001\,0010\ (18) A = 0001 0010 ( 18 ) , B = 0000 0011 ( 3 ) B = 0000\,0011\ (3) B = 0000 0011 ( 3 ) . Add.
Result = 0001 0101 = 21 = 0001\,0101 = 21 = 0001 0101 = 21 .
Z? result ≠ 0 → Z = 0 Z=0 Z = 0 . Why this step? OR of bits is 1.
N? MSB = 0 =0 = 0 → N = 0 N=0 N = 0 . Why? sign bit is 0.
C? no carry out of bit 7 → C = 0 C=0 C = 0 . Why? 18 + 3 = 21 < 256 18+3=21<256 18 + 3 = 21 < 256 .
V? signs: pos+pos→pos, no flip → V = 0 V=0 V = 0 .
Worked example Example 2 — unsigned carry, NO signed overflow
A = 1111 1111 ( 255 u = − 1 s ) A = 1111\,1111\ (255_u = -1_s) A = 1111 1111 ( 25 5 u = − 1 s ) , B = 0000 0001 ( 1 ) B = 0000\,0001\ (1) B = 0000 0001 ( 1 ) . Add.
Binary: 11111111 + 00000001 = 1 0000 0000 11111111 + 00000001 = 1\,0000\,0000 11111111 + 00000001 = 1 0000 0000 , keep 8 bits → 0000 0000 0000\,0000 0000 0000 .
C? carry out of MSB → C = 1 C=1 C = 1 . Why? unsigned 255 + 1 = 256 255+1=256 255 + 1 = 256 overflowed unsigned range.
Z? result is all zeros → Z = 1 Z=1 Z = 1 .
V? signed view: − 1 + 1 = 0 -1 + 1 = 0 − 1 + 1 = 0 , correct! Carry-in to sign = 1, carry-out = 1, 1 ⊕ 1 = 0 1\oplus1=0 1 ⊕ 1 = 0 → V = 0 V=0 V = 0 . Why this matters: huge unsigned carry but signed answer is perfectly right.
Worked example Example 3 — signed overflow, NO unsigned carry
A = 0111 1111 ( 127 ) A = 0111\,1111\ (127) A = 0111 1111 ( 127 ) , B = 0000 0001 ( 1 ) B = 0000\,0001\ (1) B = 0000 0001 ( 1 ) . Add.
0111 1111 + 0000 0001 = 1000 0000 0111\,1111 + 0000\,0001 = 1000\,0000 0111 1111 + 0000 0001 = 1000 0000 .
R = 1000 0000 = 128 u = − 128 s = 1000\,0000 = 128_u = -128_s = 1000 0000 = 12 8 u = − 12 8 s . Why this step? the bits just add normally.
N? MSB = 1 =1 = 1 → N = 1 N=1 N = 1 .
C? carry out of bit 7? No → C = 0 C=0 C = 0 .
V? carry into sign bit c 7 = 1 c_7=1 c 7 = 1 , carry out c 8 = 0 c_8=0 c 8 = 0 , 1 ⊕ 0 = 1 1\oplus0=1 1 ⊕ 0 = 1 → V = 1 V=1 V = 1 . Why? 127 + 1 = 128 127+1=128 127 + 1 = 128 but max signed is 127 127 127 , so the signed result wrapped to − 128 -128 − 128 . Overflow!
Worked example Example 4 — subtraction with borrow
Compute A − B A - B A − B with A = 0000 0011 ( 3 ) A = 0000\,0011\ (3) A = 0000 0011 ( 3 ) , B = 0000 0101 ( 5 ) B = 0000\,0101\ (5) B = 0000 0101 ( 5 ) .
Do A + ( ∼ B ) + 1 A + (\sim\!B) + 1 A + ( ∼ B ) + 1 . ∼ B = 1111 1010 \sim B = 1111\,1010 ∼ B = 1111 1010 , plus carry-in 1.
00000011 + 11111010 + 1 = 11111110 00000011 + 11111010 + 1 = 11111110 00000011 + 11111010 + 1 = 11111110 .
R = 1111 1110 = − 2 s = 1111\,1110 = -2_s = 1111 1110 = − 2 s . Why? 3 − 5 = − 2 3-5=-2 3 − 5 = − 2 , correct signed.
C? carry out = 0 =0 = 0 → on subtract, C = 0 C=0 C = 0 means a borrow occurred (A < B A<B A < B ). Why this step? 3 < 5 3<5 3 < 5 , so we borrowed.
V? opposite signs (pos − pos becomes pos + neg) → cannot overflow → V = 0 V=0 V = 0 .
N? MSB 1 → N = 1 N=1 N = 1 (negative). Z? 0 0 0 .
Intuition For AND/OR/XOR there is no "carry" in any meaningful sense.
Most ISAs set Z and N from the result, and clear C and V (or leave them) for logic ops. For shifts, the bit shifted out becomes the carry , which is how multi-word shifts chain.
Op
R
Z
N
C
V
ADD
A + B A+B A + B
result=0
MSB
carry-out
c n ⊕ c n − 1 c_n\oplus c_{n-1} c n ⊕ c n − 1
SUB
A − B A-B A − B
result=0
MSB
NOT borrow
sign rule
AND/OR/XOR
logic
result=0
MSB
0
0
LSL (shift left)
A ≪ 1 A\ll1 A ≪ 1
result=0
MSB
bit shifted out
—
Common mistake "Carry and Overflow are the same thing."
Why it feels right: both seem to mean "the number got too big." The truth: Carry = unsigned out-of-range; Overflow = signed out-of-range. Fix: Example 2 has C=1, V=0; Example 3 has C=0, V=1 — they are independent . Use C C C for unsigned, V V V for signed comparisons.
Common mistake "Negative flag tells me the result is actually negative."
Why it feels right: N copies the sign bit. Truth: N is just the MSB; if you're doing unsigned math, that same bit just means "value ≥ 128 \ge 128 ≥ 128 ", not negative. Fix: N is only interpreted as negative when you treat the operands as signed.
Common mistake "Subtraction's carry flag means an overflow."
Why it feels right: carry sounds like an error. Truth: on subtract, C C C is the (inverted) borrow — it's used for unsigned comparison A ≥ B, not error detection. Fix: branch instructions like BCS/BCC (carry set/clear) implement unsigned >= / <.
Recall Feynman: explain to a 12-year-old
Imagine an 8-slot counter that only holds numbers 0–255. The ALU is a robot that adds and subtracts in these slots. After every sum it raises little flags: a "it's zero!" flag, a "the top slot's lit up (looks negative)" flag, a "the answer didn't fit, it spilled over the top" carry flag, and a special "if we pretend half the numbers are negative, the sign came out wrong" overflow flag. The same robot does subtraction by flipping the second number and adding one — like walking backwards by turning around and walking forward.
Mnemonic Remember the flags:
"Zero Cats Never Overflow" → Z ero, C arry, N egative, O verflow. And: Carry = unsigned, oVerflow = Value-signed (V is for signed Value). Overflow rule: "Same signs in, sign flips out = overflow."
What does the ALU output besides the result? A set of condition flags (Z, C, N, V).
Define the Zero flag and its hardware. Z=1 iff result is all zeros; implemented as a NOR over all result bits.
What is the Negative flag equal to? The MSB (sign bit) of the result,
r n − 1 r_{n-1} r n − 1 .
Carry flag answers which range question? Whether an UNSIGNED operation exceeded the n-bit range (carry/borrow out of the MSB).
Overflow flag answers which range question? Whether a SIGNED operation left
[ − 2 n − 1 , 2 n − 1 − 1 ] [-2^{n-1}, 2^{n-1}-1] [ − 2 n − 1 , 2 n − 1 − 1 ] .
Derive overflow in terms of carries. V = c n ⊕ c n − 1 V = c_n \oplus c_{n-1} V = c n ⊕ c n − 1 (carry into sign bit XOR carry out of sign bit).
How does the ALU subtract using an adder? A − B = A + ( ∼ B ) + 1 A - B = A + (\sim B) + 1 A − B = A + ( ∼ B ) + 1 , feeding carry-in = 1.
Why is ∼ x + 1 = − x \sim x + 1 = -x ∼ x + 1 = − x ? Because
− x ≡ 2 n − x = ( 2 n − 1 − x ) + 1 = ∼ x + 1 ( m o d 2 n ) -x \equiv 2^n - x = (2^n-1 - x) + 1 = \sim x + 1 \pmod{2^n} − x ≡ 2 n − x = ( 2 n − 1 − x ) + 1 =∼ x + 1 ( mod 2 n ) .
Give a case with carry but no overflow. 255+1 (8-bit): C=1, V=0, result 0 (correct signed -1+1).
Give a case with overflow but no carry. 127+1 (8-bit): C=0, V=1, result -128 (signed wrap).
When can signed addition NOT overflow? When the operands have opposite signs.
On subtraction, what does C=0 mean (ARM/x86)? A borrow occurred, i.e. A < B (unsigned).
What flags do logic ops (AND/OR/XOR) typically set? Z and N from the result; C and V are cleared.
Where does the carry come from on a left shift? The bit shifted out of the MSB becomes the carry flag.
invert bits add 1 enables
unsigned carry-out of MSB
ALU combinational circuit
Operands A B plus control code
Intuition Hinglish mein samjho
ALU matlab CPU ke andar ka calculator. Tum do binary numbers do aur ek operation (add, sub, AND, OR) chuno — ALU result deta hai PLUS chaar chhote flags: Zero, Carry, Negative, Overflow . Ye flags CPU ko extra info dete hain jo akela result nahi bata sakta. Jaise agar 8-bit me answer fit hi nahi hua, to Carry flag wo "spill" wala bit yaad rakhta hai.
Sabse important confusion: Carry vs Overflow . Carry tab set hota hai jab unsigned number range se bahar gaya (jaise 255+1 = 256, 8-bit me fit nahi). Overflow tab set hota hai jab signed math galat ho gaya — jaise 127+1, signed me answer -128 aa gaya, jo galat hai. Dono alag-alag sawaal puchte hain, isliye ek set ho sakta hai aur dusra nahi. Rule yaad rakho: same sign waale do numbers jodo aur result ka sign palat jaye = overflow . Opposite sign me overflow kabhi nahi hota.
Subtraction ka jugaad: ALU alag se subtract nahi karta, wo A − B = A + ( ∼ B ) + 1 A - B = A + (\sim B) + 1 A − B = A + ( ∼ B ) + 1 karta hai — yaani B ke saare bits ulto aur 1 jodo (ye two's complement me − B -B − B hai), carry-in = 1 daal do. Negative flag bas result ka top bit (MSB) hota hai. Zero flag tab 1 jab saare bits zero hon.
Exam aur real coding dono me ye kaam aata hai: jab tum if (a >= b) likhte ho, CPU andar Carry/Overflow flags dekh kar branch leta hai — unsigned compare me Carry, signed compare me Negative aur Overflow ka combination. Isliye flags samajhna = conditional branches samajhna.