ALU — operations, flags (zero, carry, overflow, negative): Visual walkthrough

We assume the parent's setup (Two's Complement Representation, Full Adder and Ripple-Carry Adder). But we rebuild every idea we use from zero.

Step 1 — What "bits in a row" even means

WHAT. A number in the computer is stored as $n$ little switches, each ON ( $1$ ) or OFF ( $0$ ). We line them up left-to-right. The rightmost switch is the smallest place-value ( $1$ ), and each switch to the left is worth twice as much. We call these switches $b_{n - 1}, b_{n - 2}, \dots, b_{1}, b_{0}$ — position $0$ on the right.

WHY. Before we can talk about "the top bit" or "a carry out of the top", we must agree on which bit is the top and how much each is worth. Everything downstream stands on this.

PICTURE. Look at figure s01: eight boxes. Under each box is its place-value ( $128, 64, 32, \dots, 1$ ). The number $01001010$ is drawn — read only the boxes that are lit, add their values: $64 + 8 + 2 = 74$ .

Figure — ALU — operations, flags (zero, carry, overflow, negative)

The place-value of box $i$ is $== 2^{i} ==$ . That is the whole reason each box left is worth double.

Step 2 — Two ways to read the SAME bits

WHAT. The exact same eight switches can mean two different numbers depending on a rule we choose:

Unsigned: just add all lit place-values. Range $0 \dots 255$ .
Signed (two's complement): the top box's value is made negative. So the " $128$ " box now counts as $- 128$ . Range $- 128 \dots 127$ .

WHY. The ALU hardware does not know or care which interpretation you meant — it just flips switches. Carry and Overflow are the two different alarms for these two different readings. You cannot understand overflow until you hold both readings side by side.

PICTURE. Figure s02 shows one bit pattern $10000011$ twice. On the left it is read unsigned ( $128 + 2 + 1 = 131$ ). On the right the top box is amber and labelled $- 128$ , giving $- 128 + 2 + 1 = - 125$ . Same switches, two answers.

Step 3 — How the adder builds a carry chain

WHAT. To add, the hardware adds column by column, right to left, exactly like grade-school addition. Each column produces a sum bit and may pass a carry into the next column left. Call the carry entering column $i$ the value $c_{i}$ . So $c_{0}$ is the carry into the rightmost column (the carry-in), $c_{1}$ enters column $1$ , ... and $c_{n}$ leaves the top column entirely.

WHY. The overflow formula compares two specific members of this chain — $c_{n}$ and $c_{n - 1}$ . We cannot compare them until we have named every carry in the chain and know exactly where each lives.

PICTURE. Figure s03 draws eight full-adder columns. Between every pair of columns a cyan arrow carries $c_{i}$ . The two arrows we will care about are drawn in amber: $c_{n - 1}$ (the carry into the top column) and $c_{n}$ (the carry leaving the top column).

Each column is a full adder from Full Adder and Ripple-Carry Adder; chaining them is the ripple-carry adder. This is pure combinational logic — no memory, output depends only on the inputs right now.

Step 4 — The sign column, alone under a microscope

WHAT. Zoom into just the top column (position $n - 1$ ). It receives three inputs: the two operand sign bits $a_{n - 1}, b_{n - 1}$ , and the incoming carry $c_{n - 1}$ . It outputs the result's sign bit $s_{n - 1}$ and the outgoing carry $c_{n}$ .

WHY. Overflow is entirely a story about the sign column misbehaving. All the lower columns just make an ordinary number; the danger is only whether the sign came out right. So we isolate this one column.

PICTURE. Figure s04 is a single full adder blown up. Three white input wires ( $a_{n - 1}$ , $b_{n - 1}$ , $c_{n - 1}$ ) enter; two amber output wires ( $s_{n - 1}$ , $c_{n}$ ) leave. The two carries we compare, $c_{n - 1}$ in and $c_{n}$ out, glow amber.

Step 5 — Seeing overflow happen (the "pos + pos → neg" trap)

WHAT. Take $A = 01111111 = 127$ and $B = 00000001 = 1$ . Add. The lower seven columns fill up and cascade a carry into the sign column: $c_{n - 1} = 1$ . But the sign bits are both $0$ , so the top column computes $0 + 0 + 1 = 1$ with no carry out: $c_{n} = 0$ . Result $= 10000000$ .

WHY. This is the smallest, cleanest overflow. Two positive numbers ( $127 + 1$ ) gave a result whose sign bit is $1$ — read as $- 128$ . The signed answer is wrong (should be $128$ , which doesn't fit). Notice: no carry left the top ( $c_{n} = 0$ ), so the Carry flag is 0 — yet the answer is broken. Carry did not catch this.

PICTURE. Figure s05 tracks the carry ripple for $127 + 1$ . A cyan wave of carries rolls up from the right (each lower column overflowing $1 + 1$ ), reaching the sign column: $c_{n - 1} = 1$ (amber, entering). The sign column emits $c_{n} = 0$ (amber, leaving, drawn dim). The result box shows the flipped sign bit in red.

Step 6 — Why XOR is the right tool (not AND, not OR)

WHAT. We just saw overflow means "carry in ≠ carry out of the sign column." The mathematical operator that outputs $1$ exactly when its two inputs disagree is XOR (exclusive-or), written $\oplus$ . So: $V = c_{n} \oplus c_{n - 1}$

WHY this tool and not another. Ask what question each gate answers:

AND ( $\land$ ): "are BOTH 1?" — wrong; we care about disagreement, not both-on.
OR ( $\lor$ ): "is AT LEAST ONE 1?" — wrong; that fires even when they agree at $1$ .
XOR ( $\oplus$ ): "are they DIFFERENT?" — exactly our question. Overflow = carries differ.

There are only four possible pairs $(c_{n}, c_{n - 1})$ , and we can check every one — no case is left out.

PICTURE. Figure s06 is a 2×2 truth grid. The two "agree" cells ( $0, 0$ and $1, 1$ ) are cyan and labelled "no overflow — carry passed through cleanly". The two "disagree" cells ( $0, 1$ and $1, 0$ ) are amber and labelled "OVERFLOW — sign column mismatched". Only XOR carves out those two amber corners.

Recall Check the four carry pairs

$c_{n} = 0, c_{n - 1} = 0$ : carries agree → $V =$ ::: $0$ (no overflow) $c_{n} = 1, c_{n - 1} = 1$ : carries agree → $V =$ ::: $0$ (this is the " $255 + 1 = 0$ " case: big carry out but signed answer right) $c_{n} = 0, c_{n - 1} = 1$ : differ → $V =$ ::: $1$ (the $127 + 1$ overflow) $c_{n} = 1, c_{n - 1} = 0$ : differ → $V =$ ::: $1$ (the neg+neg overflow, next step)

Step 7 — The other overflow direction (neg + neg → pos)

WHAT. Take $A = 10000000 = - 128$ and $B = 11111111 = - 1$ . True answer $- 129$ — cannot fit ( $< - 128$ ). Add the bits: the sign bits are both $1$ , so the top column does $1 + 1 + c_{n - 1}$ . Here the lower columns produce $c_{n - 1} = 0$ , while the two sign $1$ s produce a carry out $c_{n} = 1$ . Result $= 01111111 = + 127$ — the sign flipped to positive.

WHY. This is the mirror image of Step 5, and it's why we needed XOR (which catches disagreement in both directions) rather than a one-sided test. Here $c_{n} = 1, c_{n - 1} = 0$ — carries disagree again → overflow.

PICTURE. Figure s07 mirrors s05: two negative numbers (top boxes lit). No carry ripples up ( $c_{n - 1} = 0$ , dim), but the two sign-bit $1$ s fire a carry out ( $c_{n} = 1$ , amber). The result's sign bit drops to $0$ — drawn in red as the wrong (positive) sign.

Step 8 — The degenerate cases (zero, and the all-clean add)

WHAT. Two boundary inputs to be sure nothing is left uncovered:

Adding zero: $A + 0$ . Every column gets a $0$ from $B$ , no carries are generated anywhere, so $c_{n - 1} = c_{n} = 0$ , $V = 0$ . The result equals $A$ — nothing can go wrong.
Small clean add: $18 + 3$ (from the parent). Carries die out before the sign column: $c_{n - 1} = 0, c_{n} = 0$ , agree, $V = 0$ ; result $21$ , Zero flag $Z = 0$ since bits aren't all zero.

WHY. A formula you only tested on the exciting cases is a formula you don't trust. Zero input and a boring in-range add must also return $V = 0$ — and they do, because both carries stay $0$ and $0 \oplus 0 = 0$ .

PICTURE. Figure s08 shows both: left, adding zero (flat, no carry arrows at all); right, $18 + 3$ with carries fizzling out at column 2, never reaching the sign column. Both sign columns show matching $c_{n - 1} = c_{n} = 0$ .

The one-picture summary

Everything compresses into figure s09: the sign column as a gate with two amber carry wires $c_{n - 1}$ (in) and $c_{n}$ (out) feeding an XOR gate whose output is $V$ . Around it, four mini result-boxes show the four carry pairs — the two "agree" pairs stamped $V = 0$ (cyan), the two "disagree" pairs stamped $V = 1$ (amber), with the example numbers ( $127 + 1$ , $- 128 + - 1$ ) attached.

Recall Feynman: retell the whole walkthrough

Picture eight boxes holding a number. We agreed the top box means $- 128$ if we're doing signed math (Step 1–2). When we add, carries ripple up the boxes like a row of dominoes, and we name the domino that hits the top box $c_{n - 1}$ and the one that leaves the top box $c_{n}$ (Step 3–4). Overflow means the top box got confused: a carry shoved into it that never came out (like $127 + 1$ , Step 5), or one came out that never went in (like $- 128 + - 1$ , Step 7). "Did exactly one carry happen, in or out?" is the question "are $c_{n}$ and $c_{n - 1}$ different?" — and that question is spelled XOR (Step 6). Adding numbers of opposite signs can never confuse the box, so overflow is impossible there. Adding zero, or any small in-range sum, leaves both carries at $0$ — they agree — so no false alarm (Step 8). One tiny gate, $c_{n} \oplus c_{n - 1}$ , watches the sign column and shouts when the sign came out wrong.

Connections

Parent: 4.1.06 ALU — operations, flags (zero, carry, overflow, negative) (Hinglish)
Two's Complement Representation — why the top bit counts as negative
Full Adder and Ripple-Carry Adder — the carry chain we watched
Combinational vs Sequential Logic — the ALU has no memory
Status / Flags Register (PSR / EFLAGS) — where $V$ , $C$ , $N$ , $Z$ live
Condition Codes and Conditional Branches — how a branch reads $V$
Signed vs Unsigned Comparison Instructions — $V$ powers signed compares, $C$ powers unsigned