4.1.6 · Coding › Computer Architecture (Deep)
ALU (Arithmetic Logic Unit) CPU ke andar ka calculator hai. Yeh do binary numbers aur ek operation selector leta hai, aur result ke saath char status bits deta hai jinhein flags kehte hain . Flags ALU ka tarika hai CPU ke baaki hisso ko side-information whisper karne ka : "answer zero tha", "bits khatam ho gayi", "signed math overflow ho gaya", "result negative lag raha hai".
WHY flags exist: akela result information kho deta hai. Agar aap do 8-bit numbers add karo aur sach mein answer 9 bits maangta ho, toh 8-bit result galat hoga — lekin carry flag woh khoi hui 9th bit preserve karta hai taaki CPU (ya aapka branch instruction) jaane.
Ek combinational circuit jo, operands A , B (har ek n bits) aur ek control code dene par, ek n -bit result R aur condition flags ka ek set produce karta hai. "Combinational" = no memory ; output sirf current inputs par depend karta hai.
Definition Chaar core flags
Zero (Z) — tab set hota hai jab result bilkul zero ho.
Carry (C) — tab set hota hai jab ek unsigned operation MSB ke bahar carry-out produce kare (ya subtract par borrow ho).
Overflow (V / O) — tab set hota hai jab ek signed operation aisa result de jo n bits mein fit na ho.
Negative (N / S) — result ke MSB ke barabar hota hai (two's complement mein sign bit).
Intuition WHY two's complement?
Hum chahte hain ki EK adder circuit addition aur subtraction dono kare, aur hum chahte hain ki x + ( − x ) = 0 naturally nikle. Two's complement negative numbers ko wrap around karta hai taaki wahi binary addition signed aur unsigned dono ke liye kaam kare.
First principles se derivation. n bits mein hmare paas 2 n patterns hain. Hum chahte hain ki − x satisfy kare x + ( − x ) ≡ 0 ( mod 2 n ) . Toh:
− x ≡ 2 n − x ( mod 2 n )
Ab 2 n − x = all ones ( 2 n − 1 ) − x + 1 = ( ∼ x ) + 1 .
Yahi famous rule hai: invert all bits and add 1 .
Ek n -bit adder ko full-adders ki chain socho, har ek carry pass karta hai. Most significant full adder ka carry out c o u t hai.
Intuition WHY carry ≠ overflow
Carry poochta hai "kya hum unsigned range se bahar gaye?" Overflow poochta hai "kya hum signed range [ − 2 n − 1 , 2 n − 1 − 1 ] se bahar gaye?" Yeh ALAG sawaal hain. Do positives jodne par "negative" answer aa sakta hai — yeh signed overflow hai, chahe carry out na ho.
Derivation. Signed overflow tab hota hai jab sign bit mein carry in aur sign bit se carry out alag ho:
V = c n ⊕ c n − 1
Equivalent mein, sign bits ke terms mein (a , b = operands ke sign, s = result ka sign), addition ke liye:
V = ( a ∧ b ∧ s ) ∨ ( a ∧ b ∧ s )
Padho ise: overflow tabhi hota hai jab dono operands ka sign same ho aur result ka sign flip ho jaye. (pos+pos→neg, ya neg+neg→pos). Opposite sign ke numbers jodne par aap kabhi overflow nahi kar sakte.
Worked example Example 1 — clean addition, koi flags nahi
A = 0001 0010 ( 18 ) , B = 0000 0011 ( 3 ) . Add karo.
Result = 0001 0101 = 21 .
Z? result ≠ 0 → Z = 0 . Yeh step kyun? Bits ka OR 1 hai.
N? MSB = 0 → N = 0 . Kyun? sign bit 0 hai.
C? bit 7 se koi carry out nahi → C = 0 . Kyun? 18 + 3 = 21 < 256 .
V? signs: pos+pos→pos, koi flip nahi → V = 0 .
Worked example Example 2 — unsigned carry, signed overflow NAHI
A = 1111 1111 ( 25 5 u = − 1 s ) , B = 0000 0001 ( 1 ) . Add karo.
Binary: 11111111 + 00000001 = 1 0000 0000 , 8 bits rakho → 0000 0000 .
C? MSB se carry out → C = 1 . Kyun? unsigned 255 + 1 = 256 unsigned range se overflow ho gaya.
Z? result bilkul zero hai → Z = 1 .
V? signed view: − 1 + 1 = 0 , bilkul sahi! Carry-in to sign = 1, carry-out = 1, 1 ⊕ 1 = 0 → V = 0 . Iska matlab kyun? Bahut bada unsigned carry lekin signed answer bilkul sahi hai.
Worked example Example 3 — signed overflow, unsigned carry NAHI
A = 0111 1111 ( 127 ) , B = 0000 0001 ( 1 ) . Add karo.
0111 1111 + 0000 0001 = 1000 0000 .
R = 1000 0000 = 12 8 u = − 12 8 s . Yeh step kyun? bits simply add ho jaati hain.
N? MSB = 1 → N = 1 .
C? bit 7 se carry out? Nahi → C = 0 .
V? sign bit mein carry c 7 = 1 , carry out c 8 = 0 , 1 ⊕ 0 = 1 → V = 1 . Kyun? 127 + 1 = 128 lekin max signed 127 hai, isliye signed result − 128 par wrap ho gaya. Overflow!
Worked example Example 4 — subtraction with borrow
Compute A − B jahan A = 0000 0011 ( 3 ) , B = 0000 0101 ( 5 ) .
A + ( ∼ B ) + 1 karo. ∼ B = 1111 1010 , plus carry-in 1.
00000011 + 11111010 + 1 = 11111110 .
R = 1111 1110 = − 2 s . Kyun? 3 − 5 = − 2 , sahi signed answer.
C? carry out = 0 → subtract par, C = 0 matlab borrow hua (A < B ). Yeh step kyun? 3 < 5 , isliye hum ne borrow kiya.
V? opposite signs (pos − pos becomes pos + neg) → overflow ho hi nahi sakta → V = 0 .
N? MSB 1 → N = 1 (negative). Z? 0 .
Intuition AND/OR/XOR mein kisi meaningful sense mein koi "carry" nahi hota.
Zyaadatar ISAs logic ops ke liye result se Z aur N set karte hain, aur C aur V clear kar dete hain (ya chod dete hain). Shifts ke liye, shift out hone wala bit carry ban jaata hai , yahi tarika hai multi-word shifts chain karne ka.
Op
R
Z
N
C
V
ADD
A + B
result=0
MSB
carry-out
c n ⊕ c n − 1
SUB
A − B
result=0
MSB
NOT borrow
sign rule
AND/OR/XOR
logic
result=0
MSB
0
0
LSL (shift left)
A ≪ 1
result=0
MSB
bit shifted out
—
Common mistake "Carry aur Overflow ek hi cheez hain."
Kyun sahi lagta hai: dono ka matlab lagta hai "number bahut bada ho gaya." Sach yeh hai: Carry = unsigned out-of-range; Overflow = signed out-of-range. Fix: Example 2 mein C=1, V=0 hai; Example 3 mein C=0, V=1 hai — yeh independent hain. unsigned ke liye C use karo, signed comparisons ke liye V .
Common mistake "Negative flag batata hai ki result actually negative hai."
Kyun sahi lagta hai: N sign bit copy karta hai. Sach: N sirf MSB hai; agar aap unsigned math kar rahe ho, toh wahi bit sirf "value ≥ 128 " matlab rakhti hai, negative nahi. Fix: N tabhi negative ki tarah interpret hota hai jab aap operands ko signed treat karo.
Common mistake "Subtraction ka carry flag overflow ka matlab hai."
Kyun sahi lagta hai: carry ek error jaisi lagti hai. Sach: subtract par, C (inverted) borrow hai — yeh unsigned comparison A ≥ B ke liye use hota hai, error detection ke liye nahi. Fix: BCS/BCC jaisi branch instructions (carry set/clear) unsigned >= / < implement karti hain.
Recall Feynman: 12-saal ke bachche ko samjhao
Socho ek 8-slot counter jo sirf 0–255 tak ke numbers rakh sakta hai. ALU ek robot hai jo in slots mein add aur subtract karta hai. Har sum ke baad yeh choti choti flags uthata hai: ek "yeh zero hai!" flag, ek "top slot jal raha hai (negative lag raha hai)" flag, ek "answer fit nahi hua, upar se spill ho gaya" carry flag, aur ek special "agar hum maan lein ki aadhe numbers negative hain, toh sign galat aaya" overflow flag. Wahi robot subtraction second number ko ulta karke aur ek jodkar karta hai — jaise peeche jaana matlab ghumna aur aage chalna.
Mnemonic Flags yaad rakho:
"Zero Cats Never Overflow" → Z ero, C arry, N egative, O verflow. Aur: Carry = unsigned, oVerflow = Value-signed (V signed Value ke liye hai). Overflow rule: "Same signs in, sign flips out = overflow."
ALU result ke alawa aur kya output karta hai? Condition flags ka ek set (Z, C, N, V).
Zero flag aur uska hardware define karo. Z=1 tabhi jab result bilkul zero ho; saare result bits par NOR se implement hota hai.
Negative flag kis ke barabar hota hai? Result ka MSB (sign bit), r n − 1 .
Carry flag kaunsa range sawaal answer karta hai? Kya UNSIGNED operation n-bit range se zyada ho gayi (carry/borrow out of MSB).
Overflow flag kaunsa range sawaal answer karta hai? Kya SIGNED operation [ − 2 n − 1 , 2 n − 1 − 1 ] se bahar gayi.
Carries ke terms mein overflow derive karo. V = c n ⊕ c n − 1 (sign bit mein carry XOR sign bit se carry out).
ALU adder use karke subtract kaise karta hai? A − B = A + ( ∼ B ) + 1 , carry-in = 1 feed karke.
∼ x + 1 = − x kyun hai?Kyunki − x ≡ 2 n − x = ( 2 n − 1 − x ) + 1 =∼ x + 1 ( mod 2 n ) .
Carry with no overflow ka example do. 255+1 (8-bit): C=1, V=0, result 0 (sahi signed -1+1).
Overflow with no carry ka example do. 127+1 (8-bit): C=0, V=1, result -128 (signed wrap).
Signed addition kabhi overflow NAHI kar sakta? Jab operands ke signs opposite hon.
Subtraction par C=0 ka matlab kya hai (ARM/x86)? Borrow hua, yaani A < B (unsigned).
Logic ops (AND/OR/XOR) typically kaun se flags set karte hain? Result se Z aur N; C aur V clear ho jaate hain.
Left shift par carry kahaan se aata hai? MSB se shift out hone wala bit carry flag ban jaata hai.
invert bits add 1 enables
unsigned carry-out of MSB
ALU combinational circuit
Operands A B plus control code