Intuition The ONE core idea
When a chip becomes too big to build cheaply, we slice it into small pieces (chiplets) and lay them side-by-side on a shared silicon "wiring board" (an interposer) so short, dense wires let them talk almost as fast as one chip. Every formula on the parent page is just a way of measuring how much cheaper (yield) or how much faster/cooler (wire length & count) this slicing makes things.
This page assumes you have never seen a single symbol used on the parent note . We build every one of them from a picture before it is allowed to appear in a formula.
Everything below lives on one picture. Look at it first — every later symbol points back to a part of it.
Three heights matter, and they are the whole reason "2.5D" gets its half-a-dimension name:
the chiplets sit on top, side by side;
the interposer is the thin silicon slab just below them, full of tiny wires;
the package is the chunky board at the bottom that meets the outside world.
Keep this stack in mind. Now we name its parts.
L = how long a wire is, tip to tip
Plain words: the physical distance a signal must travel along a metal wire.
Picture: the length of the orange line joining two chiplets in the figure above.
Why the topic needs it: the parent's central claim is "short wires win". You cannot say "short" without a symbol for length. Units are metres (m); here they range from micrometres (µm, millionths of a metre — interposer wires) to millimetres (mm, thousandths — PCB wires).
1 mm = 1000 µm . So a PCB wire (~mm) is roughly 1000× longer than the tiniest interposer wire (~µm). Hold that ratio — it is the punchline of the whole "energy per bit" story.
Before C can appear, you need to see what a capacitor is.
Intuition A wire is a bucket for electric charge
Any two conductors separated by an insulator can hold charge — one side goes positive, the other negative. That "ability to hold charge for a given voltage" is called capacitance . A wire, sitting near the silicon and other wires, behaves exactly like such a bucket. To send a 1 , you must fill the bucket ; to send a 0 , you empty it . Bigger bucket = more work every time the bit flips.
C = capacitance, c = capacitance per unit length
C (capital): total "bucket size" of a whole wire. Unit: farad (F).
c (small): how much bucket you get per metre of wire. Unit: farads per metre (F/m).
Picture: think of the wire as a row of identical mini-buckets; each metre adds c more. So a longer wire is more buckets in a row.
V = the electrical "push" (voltage)
Plain words: how hard we shove charge onto the wire. A logic "1" is the wire pushed up to voltage V ; a "0" is 0 V .
Picture: how high we fill the bucket in the figure above.
Unit: volt (V). Why needed: energy to move a signal depends not just on bucket size but on how full we fill it — and it turns out to depend on the fill level squared , which we build next.
Intuition Why energy, and why "per bit"?
Chips overheat and drain batteries because every bit sent costs a little energy. If we can show interposer wires cost less energy per flipped bit , we have proved they run cooler and cheaper. So we need a symbol for exactly that cost: E bi t .
V 2 and not just V ?"
Why it feels right: bigger push, more energy — surely linear.
The fix: as the bucket fills, each extra scoop of charge has to be pushed against the charge already there . Adding those growing pushes up gives the square. That is why lowering voltage a little saves energy a lot — it is the one V 2 term on the page, and it is squared for this reason.
N w i r es and f
N w i r es : how many wires run in parallel between two chiplets. Picture: count the orange lines in the first figure — an interposer lets you draw thousands.
f : signal rate , how many bits per second one wire carries. Unit: transfers/second (T/s or Hz). Picture: how fast the bucket in Symbol 2 is filled-emptied-filled.
Definition Pitch = spacing between wire centres
Plain words: the centre-to-centre distance between neighbouring wires. Smaller pitch = wires packed tighter = more of them fit.
PCB pitch ≈ 100 µm (fat, few).
Interposer pitch ≈ 1 µm (thin, thousands).
Why needed: pitch is what sets N w i r es . See Interconnect RC Delay and Wire Scaling and Reticle Limit and Lithography for the machines that draw these lines.
Intuition Along one 5 mm edge
1 µm 5 mm = 1 µm 5000 µm = 5000 possible wire tracks on an interposer, versus 100 5000 = 50 on a PCB. That is the ~100× per-edge advantage the parent quotes.
D and A
A : the area of a die (its footprint on the wafer). Unit: cm². Picture: the size of the square you cut out of the wafer.
D : defect density — average number of killer defects sprinkled per unit area. Unit: defects/cm². Picture: random dots scattered on the wafer; more dots per cm² = higher D .
Why needed: cost of a chip is really the cost of throwing away broken ones , and breakage depends on how much area you expose to those random dots. See Wafer Yield and Defect Density .
We need one last piece of notation before the yield formula: the number e and raising it to a power.
Worked example Plugging in real numbers (checks the parent)
With D = 0.5 defects/cm 2 :
Big die A = 4 : Y = e − 0.5 × 4 = e − 2 ≈ 0.135 → 13.5% good .
One chiplet A = 1 : Y = e − 0.5 ≈ 0.607 → 60.7% good .
Same silicon, far more usable when sliced small.
Definition The word-terms the parent leans on
Chiplet : a small die doing part of the job. Picture: one of the top blocks in figure 1.
Interposer : the passive silicon wiring slab under the chiplets. Passive = no transistors, just wires + vias .
TSV (Through-Silicon Via): a vertical copper tunnel drilled down through the silicon to reach the package. See 3D Stacking and TSVs .
Microbump : a tiny solder ball (~40–50 µm) joining chiplet to interposer.
HBM (High Bandwidth Memory): a memory stack whose ~1024-wire bus forces the use of an interposer. See High Bandwidth Memory (HBM) .
Package / BGA : the chunky bottom board meeting the outside world. See Package Substrate and Ball Grid Array .
Energy per bit E = half c L V squared
Wire pitch in micrometres
Yield Y = e to the minus D A
2.5D packaging and interposers
Read top to bottom: length, capacitance and voltage build the energy argument; pitch, wire count and rate build the bandwidth argument; defect density and area build the yield argument. All three streams pour into why 2.5D packaging wins.
Cover the right side and answer aloud before moving on.
What does L measure and in what units? The tip-to-tip length of a wire, in metres (here µm to mm).
What is the difference between C and c ? C is a whole wire's total capacitance (F); c is capacitance per unit length (F/m), and C = c L .
Why does energy per bit depend on V 2 , not V ? Each added scoop of charge fights the charge already on the wire, so the pushes sum to a square.
Write the energy-per-bit formula and say what shrinks it. E bi t = 2 1 c L V 2 ; a shorter wire (smaller L ) or lower voltage shrinks it.
What is N w i r es and how does pitch set it? The number of parallel wires; a smaller pitch packs more wires, so N w i r es rises.
Write the bandwidth formula. B W = N w i r es × f .
What do D and A stand for? D = defects per unit area; A = die area.
What does e − D A represent? The probability a die has zero killer defects, i.e. its yield Y .
Is an interposer active or passive, and what runs vertically through it? Passive (wires + vias, no transistors); TSVs run vertically through it.
Ready? Then head back to the parent topic and every symbol will already feel like an old friend.