6.5.2 · D1 · Hardware › Advanced & Emerging Architectures › 2.5D packaging and interposers
Jab ek chip itni badi ho jaati hai ki sasti nahi banti, toh hum usse chhote tukdon (chiplets) mein kaatte hain aur unhe ek shared silicon "wiring board" (interposer) par side-by-side rakhte hain taaki chhoti, dense wires unhe almost ek hi chip ki tarah fast communicate karwa sakein. Parent page ke har formula ka bas yahi kaam hai ki kitna sasta (yield) ya kitna fast/thanda (wire length & count) yeh slicing cheez banati hai, yeh measure karna.
Yeh page yeh assume karta hai ki aapne parent note mein use hua ek bhi symbol kabhi nahi dekha. Hum unhe har ek ko ek picture se build karenge pehle, uske baad hi unhe formula mein aane diya jaayega.
Neeche ki sab cheez ek hi picture mein rehti hai. Pehle ise dekho — baad ke har symbol iske kisi na kisi part ki taraf point karta hai.
Teen heights matter karti hain, aur yahi wajah hai ki "2.5D" ko apna half-a-dimension wala naam mila hai:
chiplets upar baithe hain, side by side;
interposer unke theek neeche wali patli silicon slab hai, chhoti wires se bhari hui;
package sabse neeche wala mota board hai jo baahri duniya se milta hai.
Iss stack ko dimaag mein rakho. Ab hum iske parts ke naam rakhte hain.
L = ek wire kitni lambi hai, ek sar se doosre tak
Simple words mein: woh physical distance jo ek signal ko ek metal wire ke saath travel karni padti hai.
Picture: upar wali figure mein do chiplets ko jodne wali orange line ki lambaai .
Topic ko yeh kyun chahiye: parent ka central claim hai "chhoti wires jeetti hain". "Chhota" bola hi nahi ja sakta bina lambaai ke koi symbol ke. Units hain metres (m); yahan range hai micrometres (µm, ek metre ka laakhwa hissa — interposer wires) se millimetres (mm, ek metre ka hazarwa hissa — PCB wires) tak.
Intuition Scale feel karo
1 mm = 1000 µm . Toh ek PCB wire (~mm) roughly ek interposer ki chhoti wire (~µm) se 1000× lambi hoti hai. Yeh ratio pakad ke rakho — yeh poori "energy per bit" kahani ka punchline hai.
C aane se pehle, tumhe dikhna chahiye ki capacitor hota kya hai.
Intuition Ek wire electric charge ki bucket hai
Koi bhi do conductors jo ek insulator se alag hon, charge rok sakte hain — ek side positive ho jaati hai, doosri negative. Usi "diye gaye voltage ke liye charge rokne ki ability" ko capacitance kehte hain. Ek wire, silicon aur doosri wires ke paas baithti hai, bilkul waisi hi bucket ki tarah behave karti hai. Ek 1 bhejna matlab hai bucket bharna ; 0 bhejna matlab hai ise khaali karna . Badi bucket = baar baar bit flip hone par zyada kaam.
C = capacitance, c = capacitance per unit length
C (capital): poori wire ki total "bucket size". Unit: farad (F).
c (small): har metre wire mein kitni bucket milti hai. Unit: farads per metre (F/m).
Picture: wire ko identical mini-buckets ki ek row samjho; har metre c aur jodta hai. Toh lambi wire matlab zyada buckets ek line mein.
V = electrical "push" (voltage)
Simple words mein: hum wire par charge ko kitni zor se dhakelte hain. Logic "1" matlab wire ko voltage V tak push karna; "0" matlab 0 V .
Picture: upar wali figure mein bucket ko kitna ooncha bharte hain .
Unit: volt (V). Kyun chahiye: signal move karne ki energy sirf bucket size par nahi, balki kitna bharte hain us par bhi depend karti hai — aur yeh pata chalta hai ki fill level ke square par depend karti hai, jo hum aage banate hain.
Intuition Energy kyun, aur "per bit" kyun?
Chips overheat aur batteries drain hoti hain kyunki har ek bit bhejna thodi energy leta hai. Agar hum dikha sakein ki interposer wires har flipped bit par kam energy lete hain, toh hum prove kar dete hain ki woh thande aur saste chalte hain. Toh hume exactly us cost ka ek symbol chahiye: E bi t .
V 2 kyun aur sirf V kyun nahi?"
Kyun sahi lagta hai: zyada push, zyada energy — surely linear hoga.
Fix: jaise bucket bharta hai, charge ka har extra scoop pahle se maujood charge ke against push karna padta hai. Un badhte hue pushes ko jodne par square milta hai. Isliye voltage thoda kam karna energy bahut bachata hai — yeh page par ek hi V 2 term hai, aur isi wajah se squared hai.
N w i r es aur f
N w i r es : kitni wires parallel mein do chiplets ke beech chalti hain. Picture: pehli figure mein orange lines gino — ek interposer tumhe hazaaron draw karne deta hai.
f : signal rate , ek wire kitne bits per second carry karti hai. Unit: transfers/second (T/s ya Hz). Picture: Symbol 2 ki bucket kitni fast fill-empty-fill hoti hai.
Definition Pitch = wire centres ke beech spacing
Simple words mein: paas-paas wires ke centres ke beech ki centre-to-centre distance. Chhota pitch = wires tighter packed = zyada fit hoti hain.
PCB pitch ≈ 100 µm (moti, kam).
Interposer pitch ≈ 1 µm (patli, hazaaron).
Kyun chahiye: pitch hi N w i r es set karti hai. In lines ko draw karne wali machines ke liye dekho Interconnect RC Delay and Wire Scaling aur Reticle Limit and Lithography .
Intuition Ek 5 mm edge ke saath
1 µm 5 mm = 1 µm 5000 µm = 5000 possible wire tracks ek interposer par, jabki PCB par 100 5000 = 50 . Yahi woh ~100× per-edge advantage hai jo parent quote karta hai.
D aur A
A : ek die ki area (wafer par uska footprint). Unit: cm². Picture: us square ki size jo wafer se kaati jaati hai.
D : defect density — per unit area mein randomly bikre killer defects ka average number. Unit: defects/cm². Picture: wafer par random dots bikre hue; zyada dots per cm² = zyada D .
Kyun chahiye: ek chip ki cost actually toote hue chips phenkne ki cost hai, aur breakage is baat par depend karti hai ki aap un random dots ke liye kitna area expose karte ho. Dekho Wafer Yield and Defect Density .
Yield formula se pehle notation ka ek aakhri piece chahiye: number e aur use power tak raise karna.
Definition Word-terms jinhe parent use karta hai
Chiplet : ek chhoti die jo kaam ka ek hissa karti hai. Picture: figure 1 mein upar wala ek block.
Interposer : chiplets ke neeche wali passive silicon wiring slab. Passive = koi transistors nahi, sirf wires + vias .
TSV (Through-Silicon Via): ek vertical copper tunnel jo silicon ke andar se neeche drill kiya gaya hai package tak pahunchne ke liye. Dekho 3D Stacking and TSVs .
Microbump : ek chhoti solder ball (~40–50 µm) jo chiplet ko interposer se jodin hai.
HBM (High Bandwidth Memory): ek memory stack jiska ~1024-wire bus interposer ka use force karta hai. Dekho High Bandwidth Memory (HBM) .
Package / BGA : baahri duniya se milne wala chunky bottom board. Dekho Package Substrate and Ball Grid Array .
Energy per bit E = half c L V squared
Wire pitch in micrometres
Yield Y = e to the minus D A
2.5D packaging and interposers
Upar se neeche padhein: length, capacitance aur voltage energy argument banate hain; pitch, wire count aur rate bandwidth argument banate hain; defect density aur area yield argument banate hain. Teeno streams is baat mein dalti hain ki 2.5D packaging kyun jeetti hai.
Right side cover karo aur aage badhne se pehle zor se jawab do.
L kya measure karta hai aur kis unit mein?Ek wire ki tip-to-tip length, metres mein (yahan µm se mm tak).
C aur c mein kya farak hai?C poori wire ki total capacitance hai (F); c capacitance per unit length hai (F/m), aur C = c L .
Energy per bit V 2 par kyun depend karti hai, sirf V par kyun nahi? Charge ka har added scoop wire par pahle se maujood charge se ladhta hai, toh pushes sum hokar square dete hain.
Energy-per-bit formula likhein aur batao kya ise chhhota karta hai. E bi t = 2 1 c L V 2 ; chhoti wire (chhota L ) ya kam voltage ise chhhota karta hai.
N w i r es kya hai aur pitch ise kaise set karta hai?Parallel wires ki ginti; chhota pitch zyada wires pack karta hai, toh N w i r es badhta hai.
Bandwidth formula likhein. B W = N w i r es × f .
D aur A kya stand karte hain?D = defects per unit area; A = die area.
e − D A kya represent karta hai?Probability ki ek die mein zero killer defects hain, yaani uski yield Y .
Kya ek interposer active hai ya passive, aur iske andar vertically kya chalta hai? Passive (wires + vias, koi transistors nahi); TSVs vertically iske through chalte hain.
Tayyar ho? Toh parent topic par wapas jao aur har symbol pehle se ek purane dost ki tarah lagega.