Chiplets and multi-die integration: Worked examples

This page drills the yield and energy math from Chiplets and multi-die integration until every case class feels routine. We start with a map of every scenario the topic can throw at you, then work each cell.

The scenario matrix

Before working anything, here is the complete list of case classes. Each worked example below is tagged with the cell it fills.

Cell	Case class	What is being stressed	Example
A	Baseline big monolith	$Y = e^{- D_{0} A}$ with large $A$ (yield near zero)	Ex 1
B	Split into $N$ chiplets	per-chiplet yield $e^{- D_{0} A / N}$	Ex 2
C	Degenerate: $A \to 0$ or $D_{0} \to 0$	yield $\to 1$ (limiting value)	Ex 3
D	Degenerate split: $N = 1$	chiplet formula must reduce to monolith	Ex 3
E	Limit $N \to \infty$	per-chiplet yield $\to 1$ , but assembly cost explodes	Ex 4
F	Energy: length halved	$E_{bit} \propto L$ , sign of change	Ex 5
G	Energy: off-package vs on-package	order-of-magnitude ratio (cm vs µm)	Ex 6
H	Real-world cost word problem	good-dies-per-wafer, cost per good die	Ex 7
I	Exam twist: solve for $D_{0}$ or $A$	invert the exponential with $ln$	Ex 8
J	Break-even: when do chiplets win?	compare total cost, find crossover	Ex 9

We will hit every cell A–J.

Cell A — the doomed monolith

Worked example Ex 1 — Big die, brutal yield

A monolithic die has area $A = 750$ mm² on a process with defect density $D_{0} = 0.006$ defects/mm². What is the yield?

Forecast: guess first — will more or fewer than half the dies be good? (Hint: the exponent will be big.)

Step 1. Form the exponent $D_{0} A = 0.006 \times 750 = 4.5$ . Why this step? The yield formula $Y = e^{- D_{0} A}$ only depends on the product $D_{0} A$ — the expected number of defects on one die. Computing it first tells us instantly how bad things are: an exponent above ~3 means near-total loss.

Step 2. Apply the formula: $Y = e^{- 4.5} \approx 0.0111$ . Why this step? $e^{- 4.5}$ is "the chance zero defects land here" — the only way a die survives.

Answer: about 1.1% of dies are good.

Verify: Sanity check the sign and size — the exponent is negative (yield must be below 1 ✓) and large in magnitude (so yield near 0 ✓). Units: $D_{0} A = [mm^{- 2}] [mm^{2}]$ is dimensionless ✓, so the exponent is pure number as required.

Cell B — splitting rescues yield

Worked example Ex 2 — Same silicon, cut into 5

Take the same $A = 750$ mm² and $D_{0} = 0.006$ , but split it into $N = 5$ chiplets of $150$ mm² each. What is the yield per chiplet, and how many times more likely is a chiplet to survive than the monolith?

Forecast: the exponent shrinks by 5×. Guess the per-chiplet yield before reading on.

Step 1. New per-chiplet area $A / N = 750/5 = 150$ mm². Why this step? Cutting the die into equal pieces divides the area, and yield cares only about area. Each piece now catches one-fifth of the expected defects.

Step 2. Exponent $D_{0} \cdot (A / N) = 0.006 \times 150 = 0.9$ . Why this step? This is the expected defect count per chiplet — down from 4.5 to 0.9.

Step 3. $Y_{chiplet} = e^{- 0.9} \approx 0.4066$ . Why this step? Same "zero defects" logic, just on the smaller area.

Step 4. Ratio to monolith: $\frac{e ^{- 0.9}}{e ^{- 4.5}} = e^{4.5 - 0.9} = e^{3.6} \approx 36.6$ . Why this step? Dividing exponentials subtracts exponents — a clean way to express "how many times better" without the tiny decimals. A chiplet is ~37× more likely to be a good die.

Verify: $e^{- 0.9} \approx 0.407$ is between 0 and 1 ✓. Cross-check the ratio: $0.4066/0.0111 \approx 36.6$ ✓ — matches $e^{3.6}$ .

Cells C & D — the degenerate inputs (never skip these)

Worked example Ex 3 — Zero area, zero defects, single split

Check three edge cases of $Y = e^{- D_{0} A}$ and the split formula $e^{- D_{0} A / N}$ : (a) $A \to 0$ ; (b) $D_{0} = 0$ (a perfect process); (c) $N = 1$ (no split at all).

Forecast: all three should give the "obvious" physical answer. Which value?

Step 1 (Cell C, $A \to 0$ ). $Y = e^{- D_{0} \cdot 0} = e^{0} = 1$ . Why this step? A die of zero area has nowhere for a defect to land, so it is always good. The formula must — and does — give yield $= 1$ . Any formula that failed this limit would be wrong.

Step 2 (Cell C, $D_{0} = 0$ ). $Y = e^{- 0 \cdot A} = e^{0} = 1$ . Why this step? A flawless process (no defects anywhere) yields every die. Same limit, reached from the other variable — good consistency check.

Step 3 (Cell D, $N = 1$ ). $Y_{chiplet} = e^{- D_{0} A /1} = e^{- D_{0} A}$ . Why this step? "Splitting into one piece" is the monolith. A correct chiplet formula must collapse back to the monolith formula at $N = 1$ — and it does. This is how you trust a generalisation: it contains the special case.

Verify: All three collapse to $e^{0} = 1$ or the original $e^{- D_{0} A}$ exactly — no approximation, these are identities. ✓

Cell E — the $N \to \infty$ limit (why we don't split forever)

Worked example Ex 4 — What if we cut into infinitely many chiplets?

As $N \to \infty$ , what happens to per-chiplet yield? And why isn't "infinite chiplets" the free-lunch answer?

Forecast: the per-chiplet yield heads toward some limit. Which one — and is that the whole story?

Step 1. Per-chiplet exponent $D_{0} A / N \to 0$ as $N \to \infty$ . Why this step? Dividing a fixed number $D_{0} A$ by a growing $N$ shrinks it toward zero — each chiplet becomes vanishingly small.

Step 2. $Y_{chiplet} = e^{- D_{0} A / N} \to e^{0} = 1$ . Why this step? Tiny chiplets are almost certainly defect-free — yield approaches a perfect 100%.

Step 3 (the catch). But total system cost includes assembly of $N$ dies and $N - 1$ interfaces. That grows without bound in $N$ . So the curve of "good silicon" flattens near 1 while "packaging cost" keeps rising — there is an economic optimum at finite $N$ , not infinity. Why this step? The formula alone lies by omission; the [!mistake] callout in the parent ("chiplets aren't always cheaper") is exactly this limit made concrete.

Verify: Plug $N = 1 0^{6}$ with our numbers: $e^{- 4.5/1 0^{6}} \approx 0.9999955$ — essentially 1 ✓, confirming the limit while common sense confirms cost explodes.

Cells F & G — energy per bit (see the figure)

Figure — Chiplets and multi-die integration

Look at the figure: two links carrying one bit. The orange short link is on-package (µm scale); the blue long link goes off-package to a PCB trace (cm scale). Wire capacitance $C$ grows with length $L$ , and energy per bit is $\frac{1}{2} C V^{2}$ , so length is the whole story when $V$ is fixed.

Worked example Ex 5 (Cell F) — Halve the wire, halve the energy

A die-to-die link has length $L_{1} = 2$ mm and costs $E_{1} = 1.2$ pJ/bit. A redesign brings the dies closer so $L_{2} = 1$ mm, with the same voltage. What is the new energy per bit?

Forecast: length halves. Does energy halve, quarter, or stay the same?

Step 1. Since $C \propto L$ and $V$ is unchanged, $E_{bit} \propto L$ . So $\frac{E _{2}}{E _{1}} = \frac{L _{2}}{L _{1}} = \frac{1}{2}$ . Why this step? In $E = \frac{1}{2} C V^{2}$ , holding $V$ fixed makes $E$ ride entirely on $C$ , and $C$ rides entirely on $L$ . Only the ratio of lengths matters — the unknown proportionality constant cancels.

Step 2. $E_{2} = \frac{1}{2} \times 1.2 = 0.6$ pJ/bit. Why this step? Half the length, half the capacitance, half the charging energy.

Verify: Units stay pJ/bit ✓. The change is a decrease (shorter wire must cost less) ✓ — sign is right.

Cell H — real-world cost word problem

Worked example Ex 7 — Good dies per wafer and cost each

A 300 mm wafer has usable area $\approx 70, 000$ mm². Process cost is $8000 per wafer, $D_{0} = 0.005$ defects/mm². (a) For a monolithic die $A = 800$ mm², how many good dies per wafer, and cost per good die? (b) Repeat for chiplets of $A = 200$ mm².

Forecast: which route gives cheaper good silicon? Guess before the arithmetic.

Step 1 (gross dies). Monolith: $70000/800 = 87.5 \to 87$ whole dies. Chiplet: $70000/200 = 350$ dies. Why this step? You can only cut whole dies from a wafer; the wafer area divided by die area (rounded down) gives how many fit.

Step 2 (yield each). Monolith $Y = e^{- 0.005 \times 800} = e^{- 4} \approx 0.0183$ . Chiplet $Y = e^{- 0.005 \times 200} = e^{- 1} \approx 0.3679$ . Why this step? Apply $Y = e^{- D_{0} A}$ per die — the fraction of the gross dies that actually work.

Step 3 (good dies). Monolith: $87 \times 0.0183 \approx 1.59 \to\approx 1.6$ good dies. Chiplet: $350 \times 0.3679 \approx 128.8$ good dies. Why this step? Good dies = gross dies × yield.

Step 4 (cost per good die). Monolith: $8000/1.59 \approx \$ 5031 $. C hi pl e t :$ 8000/128.8 \approx $62.1 $. *Why this step?* The wafer costs the same \$ 8000 either way; dividing by the number of usable dies gives what each good die actually costs. The monolith wastes almost everything, so each survivor is astronomically expensive.

Answer: ~$5031 per good monolithic die vs ~$62 per good chiplet — an ~81× gap in raw silicon cost (before packaging).

Verify: Chiplet cost far below monolith ✓ (matches the parent's whole thesis). Ratio $5031/62.1 \approx 81$ ✓. Note this ignores packaging — Ex 9 puts that back.

Cell I — exam twist: invert the exponential

Worked example Ex 8 — Solve for the defect density

A fab measures 60% yield on a $A = 120$ mm² die. What is the defect density $D_{0}$ ?

Forecast: you'll need to undo an exponential. Which operation undoes $e^{x}$ ?

Step 1. Start from $Y = e^{- D_{0} A}$ with $Y = 0.60$ , $A = 120$ . Why this step? We know $Y$ and $A$ ; the unknown is inside the exponent. To pull it out we must reach for the inverse of $e^{(\cdot)}$ .

Step 2. Take the natural log of both sides: $ln Y = - D_{0} A$ . Why this step? $ln$ is defined precisely as the function that undoes $e^{(\cdot)}$ : $ln (e^{x}) = x$ . That is why we use $ln$ and not $lo g_{10}$ — it cancels the base- $e$ exponential exactly, with no stray factor.

Step 3. Solve: $D_{0} = - \frac{ln Y}{A} = - \frac{ln 0.60}{120} = - \frac{- 0.5108}{120} \approx 0.004257$ defects/mm². Why this step? $ln 0.60$ is negative (yield below 1), and the leading minus flips it positive — a defect density can't be negative, so this sign flip is a built-in sanity gate.

Answer: $D_{0} \approx 0.00426$ defects/mm².

Verify: Plug back: $e^{- 0.004257 \times 120} = e^{- 0.5108} \approx 0.600$ ✓. Positive $D_{0}$ ✓; units defects/mm² ✓.

Cell J — the break-even (when do chiplets actually win?)

Worked example Ex 9 — Find the crossover including packaging cost

Silicon cost per good die is $62 (chiplet, from Ex 7) but each chiplet system needs 4 chiplets plus packaging that costs $P per assembled system. The monolithic good die is $5031 with no extra packaging. Below what packaging cost $P does the chiplet route win?

Forecast: the chiplet system uses 4 chiplets — guess whether $P has hundreds or thousands of dollars of headroom.

Step 1. Chiplet system silicon cost $= 4 \times \$ 62.1 = $248.4$. Why this step? A working system needs 4 good chiplets, so we pay for four survivors, not one.

Step 2. Total chiplet cost $= 248.4 + P$ . Win condition: $248.4 + P < 5031$ . Why this step? "Winning" means the chiplet system's total cost (silicon + packaging) undercuts the monolith. We add packaging back — exactly the cost the parent's [!mistake] warned we must not forget.

Step 3. Solve: $P < 5031 - 248.4 = \$ 4782.6 $. *Why this step?* Subtract the silicon term to isolate the packaging budget. As long as advanced packaging costs less than ~\$ 4783 per system, chiplets are cheaper here.

Answer: chiplets win while packaging $P < $4783 per system. (Real packaging is far below this, so chiplets clearly win for a big die — but shrink the die and the monolith cost drops, eating this headroom, which is why small dies stay monolithic.)

Verify: At $P = 4782.6$ : chiplet total $= 248.4 + 4782.6 = 5031.0 =$ monolith cost — exact break-even ✓. For any smaller $P$ , chiplet total is strictly less ✓.

Recall Quick self-test across the matrix

Which cell does each belong to? " $Y = e^{- D_{0} A}$ with $A = 750$ , yield ~1%" ::: Cell A (big monolith) " $N = 1$ reduces the split formula to the monolith" ::: Cell D (degenerate split) "Off-package bit costs 10× the on-package bit" ::: Cell G (energy order of magnitude) "Take $ln$ to solve for $D_{0}$ " ::: Cell I (invert the exponential) "Find the packaging budget where chiplets break even" ::: Cell J (break-even)

Connections

Chiplets and multi-die integration — the parent topic these examples drill.
Wafer yield and defect density — the $e^{- D_{0} A}$ model used in Cells A–E, H, I.
Interconnect energy and dark silicon — the $\frac{1}{2} C V^{2}$ energy math in Cells F, G.
Advanced packaging (2.5D 3D interposers) — the packaging cost added back in Cell J.
Moore's Law and its slowdown — why the reticle limit forces splitting at all.
Memory bandwidth and HBM — where short 3D links pay off in bandwidth.
Heterogeneous integration — mixing nodes, another reason chiplets win.