Thermal design power (TDP): Worked examples — Hardware deep dive

This page is a drill sheet for Thermal design power (TDP). We will not re-teach the theory from scratch — instead we hunt down every kind of situation the thermal-design equation can throw at you, and solve one clean example for each. By the end there should be no configuration of numbers that surprises you.

Before we start, let's re-anchor the one equation everything hangs on, in plain words.

Definition The one law, plus its sign convention

Heat flows "downhill" from a hot chip to cool air, exactly like water flows downhill or current flows across a resistor. The steepness needed is the temperature difference $Δ T$ (in °C), the "flow" is the power $P$ (in watts, W — one watt is one joule of heat leaving each second), and the "difficulty of flow" is the thermal resistance $R_{θ}$ (in °C per watt — how many degrees hotter the chip gets for each extra watt it must shed).

$Δ T = P \times R_{θ}$

Rearranged three ways, because every problem hands you two of these and hides the third: $P = \frac{Δ T}{R _{θ}}, R_{θ} = \frac{Δ T}{P}, Δ T = P R_{θ}$

Sign convention (memorise this): we always write $Δ T = T_{hot} - T_{cold} = T_{j} - T_{ambient}$ , so that heat flowing out of the chip makes $Δ T$ positive. Physical thermal resistance $R_{θ}$ is always positive (a real material can only resist heat, never pump it). Therefore, with $P > 0$ :

$Δ T > 0$ → normal case, heat flows chip → air.
$Δ T = 0$ → chip is exactly at air temperature, no net flow.
$Δ T < 0$ → the "budget" is negative because the air is hotter than the chip's limit; this is not reverse heat flow inside your cooler and it is not a calculation error — it is a flag that no passive cooler can keep the chip in spec (you'd need active refrigeration). We meet this in Case F.

Figure s01 — the thermal ladder. Four horizontal black lines are stacked like rungs: the top rung is the chip junction at $T_{j} = 100 ° C$ (hottest), then the case, then the heatsink (sink), and the bottom rung is the ambient air at $T_{ambient} = 30 ° C$ (coolest). A tall red arrow on the left labelled "heat flow" points downward through all four rungs — heat always travels top-to-bottom, hot to cold. Between each pair of rungs a smaller arrow is annotated with a resistance and the temperature it drops for the $95 W$ chip of Examples 1–5: $R_{θ, JC} = 0.25$ drops $23.75 ° C$ , $R_{θ, CS} = 0.10$ drops $9.5 ° C$ , and the red bottom rung $R_{θ, SA} = 0.387$ drops $36.75 ° C$ . These three drops stack up to the total $70 ° C$ rise. Each rung is one resistance the heat must climb down through, and the resistances add in series — the same heat passes through all of them one after another:

$R_{θ, total} = R_{θ, JC} + R_{θ, CS} + R_{θ, SA}$

$R_{θ, JC}$ — Junction-to-Case, baked into the chip package.
$R_{θ, CS}$ — Case-to-Sink, the thermal-paste layer.
$R_{θ, SA}$ — Sink-to-Ambient, the heatsink + fan (the part you choose — drawn in red because it's the knob you control in Examples 1, 2 and 4).

That "add them up" rule is the whole reason series resistances matter here — see Heatsink design and thermal resistance. Keep this ladder open beside you: every example below is just this picture with different numbers on the rungs.

The scenario matrix

Here is every distinct kind of case this topic can produce. Each worked example below is tagged with the cell it lands in.

#	Case class	What makes it different	Example
A	Solve for the unknown resistance	given $Δ T$ , $P$ , some $R$ s → find missing $R$	Ex 1
B	Solve for temperature	given $R$ s and $P$ → find junction temp, does it throttle?	Ex 2
C	Ratio / scaling (no absolute values)	$V^{2} f$ scaling from overclock	Ex 3
D	Degenerate: perfect cooler ( $R \to 0$ )	limiting behaviour, zero resistance	Ex 4
E	Degenerate: no cooler / zero power	$P = 0$ or $R \to \infty$ edge cases	Ex 5
F	Hot-ambient / sign of the budget	$T_{ambient}$ near or above $T_{j, max}$ → budget zero or negative	Ex 6
G	Real-world word problem	TDP vs measured wall power	Ex 7
H	Exam-style twist	undervolt to fit a fixed cooler (reverse ratio)	Ex 8

Case A — Solve for a missing resistance

Worked example Example 1 — Heatsink budget (cell A)

A CPU has $TDP = 95 W$ and $T_{j, max} = 100 ° C$ . Room air is $T_{ambient} = 30 ° C$ . The package gives $R_{θ, JC} = 0.25 ° C / W$ and the paste gives $R_{θ, CS} = 0.10 ° C / W$ . What is the largest heatsink $R_{θ, SA}$ you can use and still not throttle?

Forecast: guess — will the answer be above or below $0.5 ° C / W$ ? Jot it down.

Temperature budget $Δ T = 100 ° C - 30 ° C = 70 ° C$ . Why this step? This is the total "downhill drop" available — the whole height of the ladder in the figure. We can never let the junction climb past $T_{j, max}$ , so $Δ T$ is our whole allowance.
Total resistance allowed $R_{θ, total} = \frac{Δ T}{TDP} = \frac{70 ° C}{95 W} = 0.7368 ° C / W$ . Why this step? From $Δ T = P R_{θ}$ , the most resistance the whole stack may have without exceeding the drop is $Δ T / P$ . Units: $° C \div W = ° C / W$ . (Here $TDP$ is the chip's power $P$ — same number.)
Subtract the fixed rungs $R_{θ, SA} = 0.7368 ° C / W - 0.25 ° C / W - 0.10 ° C / W = 0.3868 ° C / W$ . Why this step? Series resistances add (top two rungs of the ladder are fixed), so the red heatsink rung gets whatever is left over. All three quantities carry °C/W, so the subtraction is dimensionally clean.

Answer: $R_{θ, SA} \leq 0.387 ° C / W$ .

Verify: rebuild the temperature. $95 W \times (0.25 + 0.10 + 0.3868) ° C / W = 95 \times 0.7368 = 70 ° C$ rise → $30 + 70 = 100 ° C = T_{j, max}$ . ✓ Units: $W \times \frac{° C}{W} = ° C$ . ✓

Case B — Solve for temperature (does it throttle?)

Worked example Example 2 — Will it throttle? (cell B)

The same chip (TDP $95 W$ , $T_{j, max} = 100 ° C$ , ambient $30 ° C$ , $R_{θ, JC} = 0.25 ° C / W$ , $R_{θ, CS} = 0.10 ° C / W$ ) is fitted with a real cooler rated $R_{θ, SA} = 0.45 ° C / W$ . Does it throttle?

Forecast: $0.45$ is bigger than the $0.387$ we were allowed. Feel the answer before computing.

Total resistance $R_{θ, total} = 0.25 ° C / W + 0.10 ° C / W + 0.45 ° C / W = 0.80 ° C / W$ . Why this step? We now know every rung of the ladder, so add them for the full path (all in °C/W).
Predicted rise $Δ T = P R_{θ} = 95 W \times 0.80 ° C / W = 76 ° C$ . Why this step? Forward direction of the law — heat times resistance gives the temperature climb (the ladder is now taller than in Ex 1). Units: $W \times ° C / W = ° C$ .
Junction temperature $T_{j} = T_{ambient} + Δ T = 30 ° C + 76 ° C = 106 ° C$ . Why this step? The chip sits $Δ T$ above the air it dumps heat into — start at the bottom rung and climb.
Compare $106 ° C > 100 ° C = T_{j, max}$ .

Answer: Yes — it exceeds $T_{j, max}$ by $6 ° C$ , so Thermal throttling kicks in and the chip drops frequency until its power falls back under budget.

Verify: the break-even resistance was $0.7368 ° C / W$ ; we used $0.80 > 0.7368$ , so over-temperature is guaranteed — consistent. ✓

Case C — Ratio / scaling (overclock)

Definition The two mystery symbols in the power law, in pictures

The dynamic-power law is $P_{dyn} = α C V^{2} f$ . Two symbols need earning before we use them:

$α$ (activity factor) — a fraction between $0$ and $1$ saying what share of the transistors actually flip each clock tick. Picture a wall of light-switches: if half of them toggle on a given tick, $α = 0.5$ . Nothing switching → $α = 0$ → no dynamic power.
$C$ (capacitance) — how much electrical "charge bucket" each switching node must fill and empty. Bigger bucket → more charge shoved per flip → more heat. It's fixed by the chip's physical layout, so it does not change when you overclock.

The figure below shows why we only need a ratio: $α$ and $C$ are the same before and after an overclock, so they cancel and vanish — leaving only $V^{2} f$ to explain the whole power change.

Figure s02 — why only $V^{2} f$ matters. The horizontal axis is clock frequency $f$ in GHz; the vertical axis is dynamic power $P = (α C) V^{2} f$ in arbitrary units (with $α C$ set to $1$ ). Two straight lines rise from the origin: a black line for the "before" voltage $V = 1.10 V$ and a steeper red line for the "after" voltage $V = 1.25 V$ — the red line is steeper because higher voltage multiplies the slope by $V^{2}$ . A black dot marks the old operating point at $3.0 GHz$ on the black line; a red dot marks the new operating point at $4.0 GHz$ on the red line. The text note reminds you that $α C$ only rescales the height of both lines by the same factor, so it cancels in the ratio $P_{new} / P_{old}$ — leaving only $V^{2} f$ to explain the whole power change (see Power consumption in CMOS circuits).

Worked example Example 3 — Overclock power scaling (cell C)

A chip at $TDP = 65 W$ runs $3.0 GHz$ at $1.10 V$ . You overclock to $4.0 GHz$ at $1.25 V$ . Dynamic power dominates and switching activity is unchanged. Estimate the new heat output.

Forecast: power roughly follows $V^{2} f$ . Voltage up ~14 %, frequency up ~33 %. Guess the multiplier.

Recall the dynamic-power law $P_{dyn} = α C V^{2} f$ , with $α$ and $C$ as pictured above. Why this step? Absolute values of $α$ and $C$ are unknown, but they cancel in a ratio — so we set up a ratio, not a raw calculation.
Form the ratio $\frac{P _{new}}{P _{old}} = \frac{V _{new}^{2} f _{new}}{V _{old}^{2} f _{old}} = \frac{( 1.25 ) ^{2} \times 4.0}{( 1.10 ) ^{2} \times 3.0}$ . Why this step? $α C$ is identical top and bottom (same chip, same workload), so it disappears — this is why we use a ratio instead of guessing $C$ . The ratio is dimensionless (volts² and GHz cancel top-against-bottom).
Crunch it $= \frac{1.5625 \times 4.0}{1.21 \times 3.0} = \frac{6.25}{3.63} = 1.7218$ . Why this step? Just arithmetic — square the voltages, multiply by frequency.
Scale the TDP $P_{new} \approx 1.7218 \times 65 W = 111.9 W$ .

Answer: ≈ 112 W — nearly $1.72 \times$ the original. Your $65 W$ cooler is now badly undersized (Overclocking and voltage scaling).

Verify: the $V^{2}$ term alone is $(1.25/1.10)^{2} = 1.291$ ; the $f$ term is $4.0/3.0 = 1.333$ ; product $1.291 \times 1.333 = 1.721$ . ✓ Matches step 3.

Case D — Degenerate: the perfect cooler

Worked example Example 4 — Ideal heatsink,

$R_{θ, SA} \to 0$ (cell D) Push Example 2's cooler to a fantasy limit: an infinitely good heatsink with $R_{θ, SA} = 0$ . Same $95 W$ chip, ambient $30 ° C$ . What junction temperature results, and is the chip now unbreakable?

Forecast: does the chip fall all the way to room temperature? Guess before reading.

Remaining resistance $R_{θ, total} = 0.25 ° C / W + 0.10 ° C / W + 0 = 0.35 ° C / W$ . Why this step? Setting the red rung of the ladder to zero deletes only that rung — the top two rungs $R_{θ, JC}$ and $R_{θ, CS}$ remain, because heat still has to crawl out of the silicon and through the paste first.
Junction rise $Δ T = 95 W \times 0.35 ° C / W = 33.25 ° C$ . Why this step? Forward law again on the irreducible part of the path.
Junction temperature $T_{j} = 30 ° C + 33.25 ° C = 63.25 ° C$ .

Answer: $T_{j} = 63.25 ° C$ — comfortably safe, but not room temperature. The floor is set by the package and paste you can never delete.

Verify: as $R_{θ, SA} \to 0$ , $R_{θ, total} \to 0.35 ° C / W$ ; any positive heatsink resistance only adds to $Δ T$ , so $63.25 ° C$ is the coldest the junction can ever be at $95 W$ . ✓ Lower-bound sanity check passes.

Case E — Degenerate: no power, or no cooler

Worked example Example 5 — The two zero-limits (cell E)

Same chip. Two edge questions: (a) The CPU idles at $P = 0 W$ (imagine it fully asleep). What is $T_{j}$ ? (b) You forget the heatsink entirely, so the sink-to-air path is effectively open: $R_{θ, SA} \to \infty$ . What happens to $T_{j}$ ?

Forecast: one of these gives a boring answer and one gives a runaway. Guess which is which.

Part (a): plug $P = 0$ into $Δ T = P R_{θ} = 0 W \times R_{θ} = 0 ° C$ . Why this step? No heat is generated, so there is no temperature drop to sustain — the whole ladder collapses to zero height.
So $T_{j} = T_{ambient} + 0 = 30 ° C$ . Why this step? With nothing to shed, the chip simply equalises with room air — the degenerate "no source" case.
Part (b): let $R_{θ, SA} \to \infty$ in $Δ T = P R_{θ, total}$ . Since $R_{θ, total} = 0.35 ° C / W + R_{θ, SA}$ , we get $Δ T \to \infty$ . Why this step? An open thermal path (the bottom rung of the ladder stretched to infinity) means heat piles up without limit — the math predicts unbounded temperature.
Reality clamp: the chip hits $T_{j, max} = 100 ° C$ almost instantly, throttles hard, and if that fails, its thermal shutdown trips.

Answer: (a) $T_{j} = 30 ° C$ (equals ambient). (b) $T_{j} \to \infty$ mathematically → in practice immediate throttle / shutdown.

Verify: (a) $30 + 95 \times R_{θ}$ with the power set to $0$ gives $30$ for any $R_{θ}$ . ✓ (b) $Δ T = 95 \times (0.35 + R)$ grows without bound as $R$ grows. ✓

Case F — Hot ambient / sign of the budget

Worked example Example 6 — When the room is too hot (cell F)

A data-center rack runs a $150 W$ chip with $T_{j, max} = 95 ° C$ . The inlet air is $95 ° C$ because the aisle cooling failed. What temperature budget remains, and what heatsink can save it?

Forecast: the room is at the junction limit. Can any cooler work?

Budget $Δ T = T_{j, max} - T_{ambient} = 95 ° C - 95 ° C = 0 ° C$ . Why this step? The allowance is the difference between the ceiling and the air. Here they coincide, so there is zero room — the ladder has no height to work with.
Required total resistance $R_{θ, total} = \frac{Δ T}{P} = \frac{0 ° C}{150 W} = 0 ° C / W$ . Why this step? To keep $Δ T = 0$ while pushing $150 W$ , resistance would have to be exactly zero — physically impossible, since even a bare die has $R_{θ, JC} > 0$ .
Even hotter air — suppose inlet climbs to $100 ° C$ : $Δ T = 95 ° C - 100 ° C = - 5 ° C$ . Why this step? By our sign convention, $Δ T < 0$ means the air is hotter than the allowed junction.
Required resistance now goes negative $R_{θ, total} = \frac{Δ T}{P} = \frac{- 5 ° C}{150 W} = - 0.0333 ° C / W$ . Why this step? The formula spits out a negative resistance. Read it correctly: a real material's $R_{θ}$ is always $\geq 0$ (heat only resists, never pumps), so a required $R_{θ} < 0$ is unachievable by any passive cooler. It is not reverse heat flow inside your heatsink and not an arithmetic slip — it is the equation's way of saying "impossible without active refrigeration that pumps heat against the gradient."

Answer: At $95 ° C$ inlet the required $R_{θ}$ is exactly $0$ (impossible); above $95 ° C$ the budget is negative and the required $R_{θ}$ is negative ( $- 0.033 ° C / W$ at $100 ° C$ inlet) — meaning passive cooling fails entirely. The fix is fixing the room (or adding a refrigeration loop), not the heatsink.

Verify: budget sign flips exactly when $T_{ambient} = T_{j, max}$ : for inlet $94 ° C$ , $Δ T = + 1$ (tiny but positive → tiny positive $R_{θ}$ ); for $96 ° C$ , $Δ T = - 1$ (negative → negative $R_{θ}$ ). ✓ And $- 5/150 = - 0.0333 ° C / W$ . ✓

Case G — Real-world word problem

Worked example Example 7 — TDP vs the wall meter (cell G)

A laptop CPU is rated $15 W$ TDP. A plug-in meter reads 48 W at the wall during a benchmark. Your friend cries "the TDP is a lie!" Reconcile the numbers.

Forecast: does $48 W$ contradict a $15 W$ TDP? (It does not — figure out why.)

TDP is chip-only heat. The $15 W$ describes the CPU's thermal output for cooling design, nothing else. Why this step? TDP answers "how much heat must the cooler move," not "how much does the whole laptop eat."
List the other consumers. GPU $\approx 14 W$ , display backlight $\approx 8 W$ , RAM + SSD + board $\approx 5 W$ . Why this step? Every subsystem draws power independently of the CPU's thermal spec.
Add supply loss. Sum so far $= 15 + 14 + 8 + 5 = 42 W$ ; the charger/PSU is ~ $88%$ efficient, so wall draw $= 42 W /0.88 = 47.7 W$ . Why this step? The wall meter sees power before conversion losses, so we divide by efficiency to inflate the internal total up to the plug. (Efficiency is dimensionless, so watts stay watts.)

Answer: $\approx 48 W$ at the wall is fully consistent with a $15 W$ CPU TDP — no contradiction, different quantities.

Verify: $42/0.88 = 47.73 W \approx 48 W$ measured. ✓ And the CPU's share $15 W$ is only $\approx 31%$ of the wall reading, exactly why TDP $\neq =$ system power. ✓

Case H — Exam-style twist (reverse the scaling)

Worked example Example 8 — Undervolt to fit a fixed cooler (cell H)

Your cooler and case can only shed 95 W. Stock, the chip is $125 W$ at $1.30 V$ , $4.5 GHz$ . You keep the frequency (you want the speed) but undervolt. Assuming dynamic power dominates and $P \propto V^{2} f$ , what voltage brings power down to 95 W?

Forecast: we need power cut by $95/125 = 0.76$ . With frequency fixed, only $V^{2}$ can drop it. Guess the new voltage before computing.

Fix frequency, isolate voltage. Since $f$ is unchanged, the ratio $\frac{P _{new}}{P _{old}} = \frac{V _{new}^{2} f}{V _{old}^{2} f} = \frac{V _{new}^{2}}{V _{old}^{2}}$ . Why this step? The $f$ terms cancel (and so do $α$ and $C$ as before), so the whole power reduction must come from the voltage-squared term — that's the only free knob left.
Solve for the voltage ratio $\frac{V _{new}^{2}}{V _{old}^{2}} = \frac{95 W}{125 W} = 0.76 \Rightarrow \frac{V _{new}}{V _{old}} = 0.76 = 0.8718$ . Why this step? Undo the square with a square root — this is why the square root appears: power is quadratic in voltage, so fixing power means rooting the ratio. The $0.76$ is dimensionless (watts cancel), so its root is too.
New voltage $V_{new} = 0.8718 \times 1.30 V = 1.133 V$ . Why this step? Multiply the old voltage by the ratio we just found to land the absolute value.

Answer: Undervolt to $\approx 1.13 V$ and you keep $4.5 GHz$ while fitting inside the $95 W$ cooler — the essence of an efficiency tune (Overclocking and voltage scaling, Turbo Boost and power states).

Verify: forward-check $(1.133/1.30)^{2} \times 125 = (0.8715)^{2} \times 125 = 0.7595 \times 125 = 94.9 W \approx 95 W$ . ✓ Units of the ratio are dimensionless, and $V$ times a pure number stays volts. ✓

Recall Quick self-test

A 100 W chip, $T_{j, max} = 90 ° C$ , ambient $40 ° C$ : largest total $R_{θ}$ ? ::: $Δ T = 50 ° C$ , so $R_{θ} = 50/100 = 0.5 ° C / W$ . Why does a perfect heatsink NOT drop the junction to ambient? ::: The internal $R_{θ, JC}$ and paste $R_{θ, CS}$ still force a rise; only $R_{θ, SA}$ went to zero. When does the temperature budget go negative, and what does it mean? ::: When $T_{ambient} > T_{j, max}$ ; a negative required $R_{θ}$ means no passive cooler works — not reverse heat flow, not a math error. Overclock keeps $f$ fixed and you want power $\times 0.64$ ; new voltage ratio? ::: $0.64 = 0.8$ , so $0.8 \times$ the old voltage. Is TDP the same as instantaneous power? ::: No — TDP is the sustained power the cooler is sized for; instantaneous turbo power can briefly exceed it.