Exercises — Thermal design power (TDP)

What it means: the cooling solution (heatsink + fan) must be able to dissipate at least 65 W of heat during a sustained realistic heavy workload without letting the chip exceed its maximum junction temperature.

What it does NOT promise: it is not the average power draw, not the idle power, and not the absolute peak — the chip can briefly pull more than 65 W during Turbo Boost. TDP is a thermal design target, not a power-consumption guarantee.

• $T_{\text{j,max}}$ ::: the maximum safe junction (die) temperature, above which the chip throttles or fails (typically 90–105 °C).
• $T_{\text{ambient}}$ ::: the surrounding air temperature the heat is finally dumped into.
• $R_{\theta ,\text{SA}}$ ::: sink-to-ambient thermal resistance — the heatsink + airflow stage of the chain.
• $\Delta T$ ::: the temperature difference the heat has to climb, here $T_{\text{j,max}}-T_{\text{ambient}}$.

False. TDP measures heat, not speed. A newer 65 W chip on a smaller process node can beat an older 125 W chip through better IPC (instructions per cycle) and architecture. Performance $\approx$ IPC $\times$ frequency $\times$ cores — compare benchmarks, not watts.

Step 1 — temperature rise (WHAT/WHY): heat pushed through resistance creates a rise, $\Delta T=P\times R_{\theta }$. $\Delta T=80\times 0.5=40\text{°C}$ Step 2 — add the starting point: the die sits $40\text{°C}$ above whatever air it dumps into. $T_{\text{j}}=T_{\text{ambient}}+\Delta T=30+40=70\text{°C}$ Answer: $T_{\text{j}}=70\text{°C}$. Comfortably below a typical 100 °C limit.

Step 1 — the budget of degrees we may spend: $\Delta T_{\text{max}}=T_{\text{j,max}}-T_{\text{ambient}}=95-25=70\text{°C}$ Step 2 — invert the Ohm's-law analogy (we know $\Delta T$ and $P$, want $R_{\theta }$): $R_{\theta ,\text{total}}\le \frac{\Delta T_{\text{max}}}{\text{TDP}}=\frac{70}{95}\approx 0.737\text{°C/W}$ Answer: $R_{\theta ,\text{total}}\le 0.737\text{°C/W}$. Anything higher and the die crosses 95 °C.

Step 1 — shrunken budget: $\Delta T_{\text{max}}=95-40=55\text{°C}$ Step 2 — new limit: $R_{\theta ,\text{total}}\le \frac{55}{95}\approx 0.579\text{°C/W}$ Interpretation: hotter air steals from your temperature budget, so you need a better (lower-resistance) cooler for the same chip. This is exactly why servers in warm rooms throttle first.

Step 1 — temperature budget: $\Delta T_{\text{max}}=100-25=75\text{°C}$. Step 2 — total allowed resistance: $R_{\theta ,\text{total}}=\frac{75}{125}=0.6\text{°C/W}$ Step 3 — subtract the fixed stages (WHY subtract): resistances in series add, so the heatsink only gets what is left after the chip package and paste each take their cut. $R_{\theta ,\text{SA}}=0.6-0.2-0.05=0.35\text{°C/W}$ Answer: $R_{\theta ,\text{SA}}\le 0.35\text{°C/W}$ — a solid tower cooler or AIO. See Heatsink design and thermal resistance.

Each stage's rise is $\Delta T_{\text{stage}}=P\times R_{\theta ,\text{stage}}$ with $P=125\text{W}$:

• Junction→Case: $125\times 0.2=25\text{°C}$
• Case→Sink (paste): $125\times 0.05=6.25\text{°C}$
• Sink→Air: $125\times 0.35=43.75\text{°C}$

Largest jump: the sink-to-air stage, $43.75\text{°C}$ — because it has the biggest resistance and carries the full 125 W. The three add to $75\text{°C}$, exactly our budget, confirming the die lands at 100 °C.

Step 1 — new total: $R_{\theta ,\text{total}}=0.2+0.30+0.35=0.85\text{°C/W}$ Step 2 — actual rise: $\Delta T=125\times 0.85=106.25\text{°C}$. Step 3 — junction temp: $T_{\text{j}}=25+106.25=131.25\text{°C}$. Answer: the die would reach 131.25 °C — 31.25 °C over the 100 °C limit, so Thermal throttling kicks in hard. A 0.25 °C/W paste error costs $125\times 0.25=31.25\text{°C}$.

Step 1 — the scaling law: $P_{\text{dyn}}\propto V^{2}f$; $\alpha$ and $C$ cancel in a ratio. $\frac{P_{\text{new}}}{P_{\text{old}}}=\frac{V_{\text{new}}^2{f}_{\text{new}}}{V_{\text{old}}^2{f}_{\text{old}}}=\frac{(1.35{)}^2\times 4.2}{(1.20{)}^2\times 3.5}$ Step 2 — crunch: $=\frac{1.8225\times 4.2}{1.44\times 3.5}=\frac{7.6545}{5.04}\approx 1.519$ Step 3 — apply to baseline: $P_{\text{new}}\approx 1.519\times 125\approx 190\text{W}$. Answer: $\approx 190\text{W}$. Notice voltage hurts most: a 12.5 % voltage bump alone multiplies power by $1.35^2/1.20^2\approx 1.27$.

Step 1 — budget: $\Delta T_{\text{max}}=100-25=75\text{°C}$ (unchanged). Step 2 — new total allowed: $R_{\theta ,\text{total}}=\frac{75}{190}\approx 0.3947\text{°C/W}$ Step 3 — subtract fixed stages: $R_{\theta ,\text{SA}}\le 0.3947-0.2-0.05=0.1447\text{°C/W}$ Verdict: you now need $\le 0.145\text{°C/W}$, but the old cooler is 0.35 °C/W — far too weak. More power shrinks the resistance budget dramatically. The overclock demands a much stronger cooler (high-end AIO or custom loop).

TDP measures CPU heat only. The wall reading is the whole system:

• CPU: 15 W
• Discrete GPU: ~10 W
• Display backlight: ~8 W
• SSD / RAM / board: ~5 W
• PSU conversion loss (~10 %): ~5 W

Sum: $15+10+8+5+5=43\text{W}\approx 45\text{W}$. No contradiction — TDP is one component's thermal load, not system energy draw.

CPU 1 (cool air, 22 °C): $R_{\theta ,\text{total}}=\frac{90-22}{200}=\frac{68}{200}=0.34\text{°C/W}$ $R_{\theta ,\text{SA}}\le 0.34-0.25=0.09\text{°C/W}$ CPU 2 (pre-warmed air, 35 °C): $R_{\theta ,\text{total}}=\frac{90-35}{200}=\frac{55}{200}=0.275\text{°C/W}$ $R_{\theta ,\text{SA}}\le 0.275-0.25=0.025\text{°C/W}$ Verdict: CPU 2 needs $\le 0.025\text{°C/W}$ — nearly 4× stricter. The downstream chip is far harder to cool, which is why rack layout and hot-aisle/cold-aisle design matter so much.

Step 1 — full chain resistance: $R_{\theta ,\text{total}}=0.20+0.15=0.35\text{°C/W}$. Step 2 — budget: $\Delta T_{\text{max}}=100-25=75\text{°C}$. Step 3 — invert $\Delta T=P{R}_{\theta }$ for power: $P_{\text{max}}=\frac{\Delta T_{\text{max}}}{R_{\theta ,\text{total}}}=\frac{75}{0.35}\approx 214.3\text{W}$ Answer: $\approx 214\text{W}$ sustained. Any chip with TDP up to this survives; a 250 W part would throttle.

Step 1 — power ratio (frequency fixed, so only $V^2$ changes): $\frac{P_{\text{new}}}{P_{\text{old}}}=\frac{V_{\text{new}}^2}{V_{\text{old}}^2}=\frac{(1.15{)}^2}{(1.30{)}^2}=\frac{1.3225}{1.69}\approx 0.7825$ Step 2 — apply: $P_{\text{new}}\approx 0.7825\times 180\approx 140.9\text{W}$. Verdict: yes — undervolting drops power to $\approx 141\text{W}$, comfortably under the 150 W cooler limit, at no clock cost. This is why undervolting is the cheapest thermal fix: power scales with $V^2$, so small voltage cuts pay off quadratically.

Given TDP, $T_{\text{j,max}}$, $T_{\text{ambient}}$, and the fixed chain resistances, what single inequality decides your heatsink? Answer ::: $R_{\theta ,\text{SA}}\le \frac{T_{\text{j,max}}-T_{\text{ambient}}}{\text{TDP}}-R_{\theta ,\text{JC}}-R_{\theta ,\text{CS}}$