5.1.5 · D2Instruction Set Architecture (ISA)

Visual walkthrough — x86 architecture overview

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This is the central result of real-mode addressing, the fossil that shaped the whole ISA.


Step 1 — What is a bit, a number, and an "address"?

WHAT: We line up boxes and count how many different numbers they can name.

WHY: Before we can ask "how big an address can we make," we must know exactly what a group of boxes can count to. Everything later is just counting.

PICTURE: Below, each box is one bit. A row of boxes can hold different patterns, so it can name the byte-numbers up to .

Figure — x86 architecture overview

  • — every single box is either or , so two possibilities per box.
  • — the count of boxes; each new box doubles the reach.
  • — the grand total of distinct byte-numbers those boxes can point to.

Step 2 — A 16-bit register can only reach 64 KB

WHAT: We compute the reach of one 16-bit register.

WHY: This is the wall Intel hit. It sets up the entire need for a trick — you cannot escape it with a single 16-bit number.

  • — sixteen boxes, each doubling, from Step 1.
  • — the exact count of addresses reachable.
  • — the same number in human units ().

PICTURE: A 16-bit register is a short ruler that only reaches to byte . Intel wanted a ruler reaching bytes ( MB ). The gap between the two rulers is the whole story.

Figure — x86 architecture overview

Step 3 — Why shifting left is the same as multiplying

WHAT: We show that sliding a binary number left by boxes multiplies it by .

WHY: In decimal, writing a on the right of gives — a . In binary, adding a on the right is a . This is the bridge between "" (what the hardware does) and "" (what the formula says).

  • — physically move every bit boxes to the left, filling zeros on the right.
  • — the multiplier this sliding produces.
  • For us , and , so is .

PICTURE: Watch the same bits ride boxes to the left; four fresh zero-boxes appear on the right. The number got bigger without a single multiplication happening — just wires.

Figure — x86 architecture overview

Step 4 — Stretch the segment across the top 20 bits

WHAT: Take the 16-bit segment, shift it , and lay the result over a 20-bit ruler.

WHY: Step 2 said we were 4 bits short at the top; Step 3 gave us the tool. Now we actually place the segment into bits through , leaving the bottom 4 bits empty (all zero).

  • The segment's 16 bits now occupy address-positions .
  • Positions are zero — a hole waiting to be filled.

PICTURE: The red band is the shifted segment sitting high on the 20-bit ruler. Notice the four empty boxes at the bottom — that emptiness is exactly the room the offset will fill in Step 5.

Figure — x86 architecture overview

Step 5 — Drop the offset into the low bits

WHAT: Add the 16-bit offset to the shifted segment.

WHY: The segment picked the neighbourhood; the offset picks the exact house. We add here (not shift) because we are combining two positioned quantities into one final number — the hardware address adder does this in one pass.

PICTURE: Segment (red, high) and offset (black, low) overlap in the middle and sum to one 20-bit address. That overlap is why bits give only , not : the two numbers share the middle bits.

Figure — x86 architecture overview

Step 6 — Worked number: watch it land

WHAT: Run the parent note's example through our machine.

WHY: To prove the pictures produce the exact hex the hardware would.

Segment , Offset :

  • — the shift appends one hex zero (hex digit = 4 bits, so = one hex place).
  • — the offset fills the freshly opened low nibble.
Figure — x86 architecture overview

Step 7 — The edge cases you must never be surprised by

Every case, every quirk — the contract demands we show them all.

PICTURE: The number line of reachable addresses, with the four cases pinned on it — zero, low, aliased, and the over-the-edge wrap.

Figure — x86 architecture overview

The one-picture summary

Two 16-bit numbers → one shift → one add → a 20-bit address. That is the whole machine, and the whole reason x86 carried segment registers for 40 years (mostly disabled in contrast to cleaner designs, and unlike the fixed-width worlds of RISC).

Figure — x86 architecture overview
Recall Feynman retelling — say it like a story

Imagine your house number has to fit in a tiny 16-digit slot, but your city grew and now needs 20-digit house numbers. Trick: use two small numbers. First number (the segment) says which block of the city — but we slide it up four places so it means "block", not "house". That sliding-left-by-four is secretly a multiply-by-sixteen, done by wires, not math. The second number (the offset) is the exact house on that block, and it drops neatly into the four empty slots the slide just opened. Add the two and you have your full 20-digit address. And because the block-number and house-number share some middle digits, two different (block, house) pairs can point at the exact same house — that overlap is real-mode aliasing. Push both numbers to their max and you spill past the edge of the city — the old chip just wrapped you back to the start. That wrap is a fossil you can still poke at today.


Recall

Recall Walkthrough checkpoints
  1. How many addresses does an -box register reach? ::: .
  2. How many bits short is a 16-bit register of a 1 MB space? ::: 4 bits ().
  3. What operation replaces "" in hardware? ::: Left shift by 4 ().
  4. Physical address of segment , offset ? ::: .
  5. Why can two (segment, offset) pairs name one byte? ::: Their ranges overlap in the middle bits (aliasing).