5.1.4 · D1Instruction Set Architecture (ISA)

Foundations — Register file organization

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This page assumes nothing. If the parent note used a symbol or a word, we build it here, from a picture, before you ever need it. Read top to bottom; each item leans on the one above it.


0. The rawest picture: a box that remembers one bit

Before any symbol, hold this image: a single cell that can be either OFF (0) or ON (1) and keeps that value even when nothing is looking at it.

Figure — Register file organization

1. Counting many words: and the exponent

Now stack many word-strips vertically. That stack is the register file itself.

Figure — Register file organization

Now the subtle symbol everyone trips on: .


2. The two verbs: READ and WRITE, and their ports

A register file only ever does two things. Naming them precisely is the whole reason the port symbols exist.

Figure — Register file organization

3. The two building blocks: MUX and decoder

These are the machines that turn a -bit address into an actual chosen row. The parent uses them by name — here is what each one is, as a picture.


4. The exponent that squares: why

The parent's scariest symbol is . You now have every piece to read it.


5. One more symbol: the hardwired R0


Prerequisite map

Bit 0 or 1

Word width n

Stack of N registers

Power of two 2 to the k

log base 2 undoes it gives k

k bit address

MUX pick one for READ

Decoder route one for WRITE

Read ports R

Write ports W

Area scales as R plus W squared

Register File

Register file organization 5.1.4

See Multiplexers and Decoders for the gate-level guts of the MUX and decoder, and Datapath and ALU for where the read ports actually go.


Equipment checklist

Cover the right side and answer aloud before you move on to the parent note.

What is a bit, in one picture?
One box that stays either lit (1) or empty (0).
What does the width measure?
How many bits are glued into one word/register.
What does count, and how is it usually written?
The number of registers; written .
Why is the count a power of two, ?
Because on/off address wires can name exactly rows.
Which tool turns "how many rows" into "how many address bits"?
The base-2 logarithm, .
What does the ceiling do and why?
Rounds up; you can't have a fraction of a wire.
Difference between a read and a write?
Read copies a row out unchanged; write replaces a row's contents.
What do and count?
Simultaneous read lanes and simultaneous write lanes (ports).
Which machine performs a read and why?
A -to-1 MUX, because reading is "pick one of many onto a bus."
Which machine performs a write and why?
A -to- decoder (plus WriteEnable), because writing is "route data to one chosen row."
Where does the square in come from?
Each cell grows in both height and width with port count; area = height × width.
What is special about R0 in RISC-V/MIPS?
It is hardwired to read 0 and ignores writes — a free constant.

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