Intuition The one core idea
A register file is a tiny grid of light-switches inside the CPU: a handful of words you can flip on/off in a single clock tick. Everything in the parent note — the symbols N , k , n , R , W , and the picture of MUXes and decoders — is just an answer to "how do I pick which switches to look at, and which one to change, without walking to far-away memory?"
This page assumes nothing . If the parent note used a symbol or a word, we build it here, from a picture, before you ever need it. Read top to bottom; each item leans on the one above it.
Before any symbol, hold this image: a single cell that can be either OFF (0) or ON (1) and keeps that value even when nothing is looking at it.
A bit is one on/off value: 0 or 1 . In the picture it's a single box that is shaded (1) or empty (0).
Picture: one square that stays lit until someone flips it.
Why the topic needs it: every register is built out of bits. If you don't picture the smallest unit, nothing above it makes sense.
Definition Word (and its width
n )
A word is a fixed-size row of bits treated as one unit. The number of bits in that row is its width , written ==n ==.
Picture: n boxes glued side by side into one horizontal strip.
Why the topic needs it: a register doesn't hold one bit, it holds a whole number — a word. When the parent writes "each register holds an n -bit word," n is just how long that strip is . Typical n = 32 or 64 .
Now stack many word-strips vertically. That stack is the register file itself.
Definition Number of registers
N
==N == is simply how many word-strips are in the stack. The parent uses N = 32 .
Picture: count the rows in the stack above.
Now the subtle symbol everyone trips on: 2 k .
N = 2 k instead of just N ?
We must point at one row using a switch made of on/off wires (bits). A group of k on/off wires can spell out 2 k different patterns — like k coins each heads/tails give 2 k combinations. So the number of rows we can address is naturally a power of two. That is why the parent writes N = 2 k : it's saying "N rows, addressed by k selector-bits."
2 k and the address width k
2 k means 2 multiplied by itself k times: 2 1 = 2 , 2 2 = 4 , 2 3 = 8 , 2 4 = 16 , 2 5 = 32 .
The ==k -bit address== is the little group of k wires that names one row.
Picture: a small dial with k notches; each setting points at exactly one row.
Why the topic needs it: the "address field" in an instruction is these k bits. For 32 registers, k = 5 .
log 2 — the tool that undoes 2 k
We keep asking the reverse question: "I have N rows, how many selector-bits k do I need?" The tool that answers "2 to what power gives N ?" is the base-2 logarithm , written log 2 N .
Why THIS tool and not another? Multiplication/exponent (2 k ) goes rows-out from bits-in. We need the inverse machine: bits-out from rows-in. log 2 is defined as exactly that inverse of 2 ( ⋅ ) — no other operation undoes a power of two.
Worked example Feel the ceiling
Suppose N = 40 registers. log 2 40 ≈ 5.32 . You can't have a third of a wire, so you round up : k = 6 bits. Six wires cover up to 2 6 = 64 rows — plenty, with 64 − 40 = 24 patterns unused.
A register file only ever does two things. Naming them precisely is the whole reason the port symbols exist.
Read = look at a chosen row and copy its word onto an output wire, leaving the row unchanged.
Write = change a chosen row to hold a new word.
Picture: reading is a camera pointed at one strip; writing is an eraser-and-pencil replacing one strip.
Definition Port, and the counts
R and W
A port is one independent "lane" that can carry a read (or a write) in the same clock tick.
==R == = number of read ports (how many rows you can look at simultaneously ).
==W == = number of write ports (how many rows you can change simultaneously ).
Picture: R separate cameras and W separate pencils, all aimed at the same stack at once.
Why the topic needs it: the instruction add rd, rs1, rs2 must look at two rows at the same time (so R = 2 ) and later change one row (W = 1 ). Ports are how "at the same time" is built in hardware.
These are the machines that turn a k -bit address into an actual chosen row. The parent uses them by name — here is what each one is , as a picture.
Definition Multiplexer (MUX) — the "pick one of many" machine
A ==2 k -to-1 multiplexer== has 2 k input wires, one output wire, and a k -bit select. It connects exactly one input to the output, chosen by the select bits.
Picture: a railway switchyard where many incoming tracks funnel into a single track; the select-dial decides which incoming train gets through.
Why THIS tool for reading? Reading is by definition "choose one row out of many and put it on the output bus." That is precisely what a MUX does. One camera = one MUX, so R read ports means R separate MUXes.
Definition Decoder — the "route to one of many" machine
A ==k -to-2 k decoder== takes k input wires and lights up exactly one of its 2 k output lines — the one whose number matches the input pattern.
Picture: an apartment mailbox panel: you punch one apartment number (k bits) and a light turns on above that one mailbox slot.
Why THIS tool for writing? Writing is the mirror image of reading: one data value must be steered into one chosen row. The decoder picks which row's "capture this now" line goes high; ANDing it with a global WriteEnable makes sure a write only happens when we actually want one.
Common mistake "MUX and decoder are the same thing."
Why it feels right: both use k select bits and both talk about "one of 2 k ."
The flaw: a MUX has many inputs → one output (gathering, for reads). A decoder has one active choice → many outputs, one lit (fanning out, for writes). They point in opposite directions.
Fix: MUX = funnel in (read). Decoder = fan out (write).
The parent's scariest symbol is ( R + W ) 2 . You now have every piece to read it.
+ " inside, and the outer square
R + W = total number of port-lanes crossing every cell (read lanes plus write lanes).
The outer ==( ) 2 == means multiply that total by itself.
Picture: each cell must grow taller to fit more horizontal word-lines and wider to fit more vertical bit-lines as ports increase — both dimensions scale with R + W . Area = height × width ⇒ ( R + W ) × ( R + W ) = ( R + W ) 2 .
Why the topic needs it: this single square is the reason wide CPUs are expensive. Doubling ports doesn't double cost — it quadruples it.
Definition R0 (register zero)
R0 is the row numbered 0 . In RISC-V/MIPS it is not built as real storage — it is permanently wired to read the word 0 , and writes to it are thrown away.
Picture: row 0's strip is painted all-empty and glued down; the eraser bounces off it.
Why the topic needs it: a free constant 0 lets add rd, rs, R0 act as a copy and add R0, R0, R0 act as a "do nothing," saving whole opcodes.
log base 2 undoes it gives k
Decoder route one for WRITE
Area scales as R plus W squared
Register file organization 5.1.4
See Multiplexers and Decoders for the gate-level guts of the MUX and decoder, and Datapath and ALU for where the read ports actually go.
Cover the right side and answer aloud before you move on to the parent note.
What is a bit, in one picture? One box that stays either lit (1) or empty (0).
What does the width n measure? How many bits are glued into one word/register.
What does N count, and how is it usually written? The number of registers; written N = 2 k .
Why is the count a power of two, 2 k ? Because k on/off address wires can name exactly 2 k rows.
Which tool turns "how many rows" into "how many address bits"? The base-2 logarithm, k = ⌈ log 2 N ⌉ .
What does the ceiling ⌈ ⌉ do and why? Rounds up; you can't have a fraction of a wire.
Difference between a read and a write? Read copies a row out unchanged; write replaces a row's contents.
What do R and W count? Simultaneous read lanes and simultaneous write lanes (ports).
Which machine performs a read and why? A 2 k -to-1 MUX, because reading is "pick one of many onto a bus."
Which machine performs a write and why? A k -to-2 k decoder (plus WriteEnable), because writing is "route data to one chosen row."
Where does the square in ( R + W ) 2 come from? Each cell grows in both height and width with port count; area = height × width.
What is special about R0 in RISC-V/MIPS? It is hardwired to read 0 and ignores writes — a free constant.