3.4.13 · D4Sequential Circuits

Exercises — Metastability and synchronizers

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Before we start, one table of the symbols we reuse, so nothing appears unexplained:

Below, one figure fixes the single most important behaviour — that MTBF rises exponentially with the settling time you grant. Study it before the exercises: the y-axis is logarithmic, yet the curve still shoots upward, which is the visual signature of exponential growth.

Figure — Metastability and synchronizers

Reading the figure (s01): the horizontal axis is (settling time in ns), the vertical axis is MTBF on a log scale. The fixed parameters are printed on the plot itself — ns, ns, MHz, MHz — so you can reproduce every point. The dashed blue and pink lines mark ns and ns — just one extra nanosecond apart. Yet on the curve they are separated by a factor in MTBF. That one-nanosecond jump for many orders of magnitude of safety is the entire economic argument for synchronizers.


Level 1 — Recognition

L1.1

State, in one sentence each, what and physically represent, and say which of the two you'd want smaller to improve MTBF.

Recall Solution
  • = resolving time constant: how quickly the cross-coupled loop amplifies a tiny imbalance away from the knife-edge. Smaller helps (faster escape → larger ).
  • = susceptibility window: the width of the time slot (setup-side + hold-side) in which a data change can trip metastability. Smaller also helps (smaller failure prefactor), but it sits in the denominator, so its effect is only linear — nowhere near as powerful as shrinking , which sits in the exponent. Answer: both smaller is better, but is the high-leverage one because it lives in the exponent.

L1.2

Look at the master MTBF equation. Which single quantity, when increased, makes MTBF grow exponentially rather than linearly?

Recall Solution

, the resolution time available. It sits inside . Every extra worth of multiplies MTBF by . This is why a synchronizer works: it hands the metastable node an almost-full clock period of .


Level 2 — Application

L2.1

A synchronizer has ns. You currently give it ns. By what factor does MTBF change if you increase to ns?

Recall Solution

MTBF , so the factor is WHAT we did: took the ratio of the two exponentials so the prefactor cancels. WHY: only the change in matters, and it enters through . Answer: MTBF grows by for one extra nanosecond. Cheap insurance. (This is exactly the blue-to-pink jump you read off figure s01.)

L2.2

Compute MTBF for: MHz, MHz, ns, ns, ns.

Recall Solution

Step 1 — prefactor (failure-rate scale): Why: both a clock edge and a data change must nearly coincide, so multiply both rates by the window width (this is the independent-arrivals assumption in action). Step 2 — exponent: , so . Step 3 — combine:


Level 3 — Analysis

L3.1

A design runs at ns with ns and ns in a two-flop synchronizer. (a) Find . (b) The team doubles the clock frequency. Assuming and are unchanged, find the new and the factor by which MTBF changes from the term alone, given ns.

Recall Solution

(a) ns. (b) Doubling frequency halves the period: ns. Then The exponent term changes by Interpretation: the term alone collapses MTBF by a factor (roughly 620,000× worse). And there's an extra hit: in the denominator also doubles, worsening MTBF by another . WHAT IT MEANS: doubling clock speed doesn't halve MTBF — it demolishes it, dominated by the exponential. This is exactly the parent note's "Forecast-then-Verify."


Level 4 — Synthesis

The next figure shows why stages multiply rather than add — look at it before solving L4.

Figure — Metastability and synchronizers

Reading the figure (s02): three flip-flops (FF1, FF2, FF3) sit in series, all driven by the destination clock shown along the bottom. The async flag enters FF1 on the left. Between FF1→FF2 and again between FF2→FF3 sits one full clock period labelled , and above each gap is written . The point the picture makes visually: each gap is an independent chance to settle, so their safety factors multiply — two gaps means the MTBF carries twice.

L4.1

Your two-flop synchronizer gives MTBF s (about 2.8 hours — unacceptable). You may add a third flip-flop, which grants a second full resolution window of ns. With ns, what is the new MTBF, and is it acceptable (say, > 1000 years)?

Recall Solution

WHAT a third flop does: FF2's output now also gets a whole clock period () to settle before FF3 samples it. Because that window is independent of FF1's window (the independence assumption from the top of the page), the survival probabilities multiply — so MTBF gains another exponential factor . , so Answer: about 154,000 years — comfortably above 1000 years. Yes, acceptable. Each added flop multiplies MTBF by ; that's why depth (more flops) beats almost every other fix.


Level 5 — Mastery

L5.1 (Design + defend)

You must cross a 1-bit control flag from a 40 MHz domain into a 200 MHz domain. Device specs: ns, ns, ns, ns. The flag toggles at most MHz. Requirement: MTBF > 100 years. (a) Which domain's clock governs the synchronizer, and why? (b) Compute for a two-flop synchronizer. (c) Compute MTBF. Does two flops suffice? (d) If not, how many flops total are needed?

Recall Solution

(a) WHICH clock: the synchronizer lives in the destination domain — here 200 MHz — because the destination is the one sampling the asynchronous flag. The flag is async relative to the 200 MHz clock, so that clock's period is what buys the resolution time. Use ns. (b) : (Sanity: , so the model applies — always check this first, per the L3 corner case.) (c) MTBF (two flops):

  • Prefactor:
  • Exponent: , so .
  • Two flops fail badly ( 100 years) — nowhere near the requirement. (d) How many flops: each extra flop beyond the second multiplies MTBF by . Target: s.
  • 3 flops (one extra window): s years. ✓ (already clears 100 years)
  • (For contrast, 4 flops would give s — absurd overkill.) Answer: a 3-flop synchronizer suffices ( years 100 years, with large margin). Two flops do not; three do. Check: , so requirement met.

Recall One-line self-test

Why does adding a flip-flop multiply MTBF by instead of adding to it? Question ::: Because each stage grants an independent resolution window; survival probabilities across independent stages multiply, and each contributes its own exponential factor.


Connections

  • D Flip-Flop — every stage above is a D flip-flop chained in series.
  • Setup and Hold Time and bound the window folded into ; enters .
  • Clock Domain Crossing (CDC) — L5 is a textbook CDC of a 1-bit control flag.
  • FIFO Design — multi-bit crossings use synchronized Gray pointers, not raw synchronizers.
  • Positive Feedback and Regeneration — the origin of the resolution law.
  • Timing Analysis — where , , come from in a real timing report.