Foundations — Multi-cycle datapath

Before you can read the Multi-cycle datapath page, you must own every word and symbol it throws at you. This page builds them one at a time, from absolute zero. No box, arrow, or symbol appears here until we have drawn it.

0. What is a "datapath" at all?

Look at the figure. Each rectangle is a box that holds or transforms bits. Each arrow is a bundle of wires carrying a number from one box to the next. The whole page is about when each arrow is allowed to carry a value — that "when" is the clock.

Why does the topic need this? Because "multi-cycle" means breaking the journey through this plumbing into timed legs. You can't understand the legs until you see the pipes.

Prerequisite: this is the same set of boxes you met in Single-cycle datapath — multi-cycle just lets you reuse them across time.

1. Bits, a word, and the register — the memory box

The parent note's internal registers — IR, A, B, ALUOut, MDR — are all just this same box, each catching a different value:

2. The clock and the "cycle"

Look at the square wave. One cycle = one full period, from one rising edge to the next. A signal must finish travelling through its box before the next edge, or the register catches garbage. This is why $T$ can never be shorter than the slowest thing that has to happen in one cycle:

That single inequality is the entire reason multi-cycle exists.

3. Reading the symbols $\leftarrow$, $[]$, and $[a:b]$

The parent note writes lines like $\text{IR}\leftarrow \text{Memory}[\text{PC}]$. Three symbols hide in there.

Why the topic needs this: every step in the parent is written as one or two of these copy-lines. Once you can read $\leftarrow$ and $[]$, the whole "five steps" table is just plain English.

4. PC, IR, ALU, register file, memory — the named boxes

5. Delay, and "worst-case"

Why the topic needs it: Example 1 in the parent is entirely "add up the delays on the longest path." The number 300 ps for the ID step comes from a register read (100) immediately followed by an ALU op (200) in the same cycle — 100 + 200 = 300.

6. CPI — turning cycles into a single fairness number

Why a weighted average and not a plain one? Because a rare 5-cycle lw should count less than a common 4-cycle add. Multiplying each cycle count by its frequency does exactly that. This feeds straight into the CPI and CPU performance equation.

How these foundations feed the topic

Everything on the left is defined on this page; the single node on the right is the parent topic. If any left-node feels shaky, re-read its section above.

Equipment checklist

Read the question, answer in your head, then reveal.