Dennard scaling and its breakdown: Exercises — Hardware deep dive

Every problem uses the same tiny toolbox. Keep it in view:

Formula The only rules you need (shrink factor

$k > 1$ ) Here $k$ is the number we divide each dimension by. A " $1.4 \times$ shrink" means $k = 1.4$ , so a length $L$ becomes $L / k$ .

Quantity	Symbol	Ideal Dennard scale
Length / width / oxide / voltage	$L, W, t_{o x}, V$	$1/ k$
Capacitance	$C = ε_{o x} W L / t_{o x}$	$1/ k$
Current	$I \approx μ C_{o x}^{''} \frac{W}{L} (V - V_{t h})^{2}$	$1/ k$
Delay / frequency	$τ = C V / I$	$1/ k$ / $k \times$ faster
Power per device	$P = I V = \frac{1}{2} C V^{2} f$	$1/ k^{2}$
Devices per area	—	$k^{2}$
Power density	$P / A$	$1$ (constant)

Figure — Dennard scaling and its breakdown

The figure above is your cheat-sheet as a picture: watch which arrows point down (shrink) and which point up (grow), and notice the amber box — power density — sitting flat at $1$ .

Level 1 — Recognition

Can you read the rules off the table and pick the right factor?

Recall Solution

What: $V \to V /2$ . Why: the electric field inside the channel is $E \approx V / L$ . We already shrank $L \to L /2$ . If we left $V$ alone, $E$ would double and cook the oxide. Scaling $V$ by the same $2$ makes $E = (V /2) / (L /2) = V / L$ — unchanged. That "same field" is the whole point of constant-field scaling. Answer: $V$ scales by $1/2$ .

Recall Solution

$τ = C V / I$ . Scale: $C \to C /2$ , $V \to V /2$ , $I \to I /2$ . $τ^{'} = \frac{( C /2 ) ( V /2 )}{I /2} = \frac{C V}{2 I} = \frac{τ}{2} .$ Delay halves → the chip runs $2 \times$ faster. Delay goes down.

Recall Solution

Area per device $= W L \to (W /2) (L /2) = W L /4$ . Four times smaller footprint → $4 \times$ more devices per $mm^{2}$ . (This is the $k^{2}$ row.)

Level 2 — Application

Plug numbers into the rules and turn the crank.

Recall Solution

$P = I V$ , and both scale by $1/ k$ , so $P \to P / k^{2}$ . $P^{'} = \frac{40}{1. 4 ^{2}} = \frac{40}{1.96} = 20.4 μ W .$ Answer $\approx 20.4 μ W$ — about half, exactly the $1/ k^{2}$ promise.

Recall Solution

Frequency scales by $k$ each node ( $τ \to τ / k$ means $f \to k f$ ). Two nodes → $k^{2} = 1.96$ . $f^{'} = 2.0 \times 1.4 \times 1.4 = 2.0 \times 1.96 = 3.92 GHz .$ Answer $\approx 3.92 GHz$ . (Historically this is exactly the free-clock era that ended when Dennard scaling broke.)

Recall Solution

Devices grow $k^{2} = 2.25 \times$ ; power per device falls to $1/ k^{2} = 1/2.25$ . $D^{'} = D \times k^{2} \times \frac{1}{k ^{2}} = 1.0 \times 2.25 \times 0.444 = 1.0 W / mm^{2} .$ Answer: unchanged, $1.0 W / mm^{2}$ . The two effects cancel exactly.

Level 3 — Analysis

The voltage knob is removed — trace the consequences.

Recall Solution

What changes: $C_{o x}^{''} \to k C_{o x}^{''}$ (thinner oxide), $W / L$ unchanged (both shrink by $k$ ), and $(V - V_{t h})^{2}$ unchanged because $V$ and $V_{t h}$ are frozen. $I^{'} = k \cdot 1 \cdot 1 \cdot I = k I = 1.4 I .$ Current rises by $1.4 \times$ . Contrast the ideal case where it fell by $1/ k$ — losing the voltage knob flips the direction.

Recall Solution

Power per device $P = I V$ : $I \to k I$ , $V \to V$ , so $P \to k P$ . Area per device still shrinks: $A \to A / k^{2}$ . So $D^{'} = \frac{P ^{'}}{A ^{'}} = \frac{k P}{A / k ^{2}} = k^{3} \frac{P}{A} = k^{3} D .$ With $k = 1.4$ : $k^{3} = 1. 4^{3} = 2.744$ . $D^{'} \approx 2.74 D$ — the chip runs $2.7 \times$ hotter per $mm^{2}$ for the same shrink. This runaway is the power wall.

Recall Solution

Leakage ratio depends only on the change in $V_{t h}$ :

=e^{+0.10/(n\,kT/q)}.$$ The denominator $n\,kT/q=1.5\times0.026=0.039\ \text{V}$. $$=e^{0.10/0.039}=e^{2.564}\approx 13.0.$$ **Leakage grows ~$13\times$ from a mere $0.1\ \text{V}$ threshold cut.** This exponential blow-up ([[Subthreshold Leakage and Static Power]]) is exactly why $V_{th}$ can't keep scaling.

The figure shows why: leakage is a curve that bends upward steeply as $V_{t h}$ falls. A small step left on the axis is a big jump up.

Level 4 — Synthesis

Combine dynamic + static, or compare two whole strategies.

Recall Solution

Dynamic per device: $P_{d y n} \propto C V^{2} f \to (1/ k) (1) (k) = 1$ per device — unchanged per device — but $k^{2} = 1.96 \times$ more devices, so dynamic area-power $\to 1.96 \times$ . $P_{d y n}^{'} = 80 \times 1.96 = 156.8 W .$ Static: given to grow $3 \times$ : $P_{s t a t}^{'} = 20 \times 3 = 60 W .$ Total: $P^{'} = 156.8 + 60 = 216.8 W .$ Answer $\approx 217 W$ — more than double, and note leakage went from $20%$ to $\frac{60}{216.8} = 28%$ of the budget. This is the dynamic-to-static shift that makes advanced nodes leakage-limited.

Recall Solution

New per-core power: $P_{1}^{'} = 1.4 \times 25 = 35 W$ . Cores you can power within $100 W$ : $⌊ 100/35 ⌋ = ⌊ 2.857 ⌋ = 2$ cores. Cores you fit on the die: the old chip had some number, and you fit $4 \times$ more per area — but the absolute count you can switch on is capped by heat, not area. If the old chip ran $4$ cores ( $4 \times 25 = 100$ W, right at TDP), the new die fits $16$ cores but can only light $2$ of them. $fraction on = \frac{2}{16} = 12.5%.$ The other $87.5%$ must stay dark — this is dark silicon.

Level 5 — Mastery

Prove a general relation and reconcile two derivation routes.

Recall Solution

Current: $C_{o x}^{''} \to k C_{o x}^{''}$ , $W / L \to 1$ , $V^{2} \to k^{- 2 α}$ : $I \propto k \cdot 1 \cdot k^{- 2 α} = k^{1 - 2 α} .$ Power per device: $P = I V \to k^{1 - 2 α} \cdot k^{- α} = k^{1 - 3 α} .$ Area per device: $\to k^{- 2}$ . Power density: $\frac{P}{A} \to \frac{k ^{1 - 3 α}}{k ^{- 2}} = k^{1 - 3 α + 2} = k^{3 - 3 α} = k^{3 (1 - α)} .$ Hmm — let's re-express with the problem's target form. Set density exponent to $3 (1 - α)$ . Constant density needs the exponent $= 0$ : $3 (1 - α) = 0 \Rightarrow α = 1$ . Check the endpoints: $α = 1 \Rightarrow k^{0} = 1$ (ideal Dennard, constant — ✓). $α = 0 \Rightarrow k^{3}$ (frozen voltage, matches L3.2's $k^{3} D$ — ✓). Only full voltage scaling ( $α = 1$ ) holds power density flat; any shortfall $α < 1$ makes the chip hotter each node, which is precisely the post-2005 reality.

Recall Solution

Route A ( $I V$ ): $I \to 1/ k$ , $V \to 1/ k$ ⇒ $P \to (1/ k) (1/ k) = 1/ k^{2}$ . ✓ Route B ( $C V^{2} f$ ): $C \to 1/ k$ , $V^{2} \to 1/ k^{2}$ , $f \to k$ ⇒ $P \to \frac{1}{k} \cdot \frac{1}{k ^{2}} \cdot k = \frac{1}{k ^{2}} . ✓$ Why it matters: $I V$ describes a static bias picture; $C V^{2} f$ describes charging/discharging a capacitor each cycle. They rest on different physics yet land on the identical $1/ k^{2}$ . That agreement is a consistency check — if they disagreed, one of the scaling assumptions would be wrong.

Recall Self-test: state every scaling factor from memory

Ideal Dennard delay factor ::: $1/ k$ (chip $k \times$ faster) Ideal Dennard power-per-device factor ::: $1/ k^{2}$ Ideal Dennard power-density factor ::: $1$ (constant) Frozen-voltage power-density factor ::: $k^{3}$ (rising) General power-density exponent for voltage scaling $1/ k^{α}$ ::: $3 (1 - α)$

Return to Dennard scaling and its breakdown · prerequisites: MOSFET Operation and Square-Law Current · Subthreshold Leakage and Static Power · Multicore and Dark Silicon