4.1.10 · D1Memory Technologies

Foundations — Multi-level cell (MLC - TLC - QLC) flash

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This page assumes you have seen nothing. We build every symbol, one at a time, each resting on the one before it. When you finish, re-read the parent note and no symbol will be new.


0 · The picture we keep coming back to

Before any symbol, look at the object we are describing.

Figure — Multi-level cell (MLC - TLC - QLC) flash

A flash cell holds electrons trapped on a little island of metal (the floating gate). More trapped electrons = more negative charge = the transistor needs a higher push-voltage before it "turns on". That push-voltage is the thing we will call . Read the bucket picture: charge level → a voltage we can measure. Hold that image; every symbol below is a label on some part of it.


1 · Charge, and why it becomes a voltage

That measurable something is a voltage.

The unit of voltage is the volt, written . So "" means a voltage of four-point-two volts — a size, like "3 metres".


2 · Levels, and the symbol

We now cut the measuring stick into bands.

Figure — Multi-level cell (MLC - TLC - QLC) flash

3 · Bits — the language of "how many facts"

Count the patterns for a few coin-counts:

coins (bits) patterns
1 2
2 4
3 8
4 16

Notice: patterns . That exponent notation is next.


4 · Powers and the symbol

Figure — Multi-level cell (MLC - TLC - QLC) flash

Figure s03 draws the doubling tree. Follow one branch: each fork multiplies the leaf-count by 2, so forks give leaves. Since each distinct pattern must map to a distinct voltage band, the number of bands is the number of patterns: where = bits stored per cell. This is the parent's central formula, and now every symbol in it is earned.


5 · The inverse question — logarithms and

Section 4 asked "given bits, how many levels?" (). Now flip it: "given levels, how many bits?" We need a tool that undoes the power of 2. That tool is the logarithm.


6 · The fencepost rule — why , never

The parent divides the voltage window by , not . Here is the picture that fixes that forever.

Figure — Multi-level cell (MLC - TLC - QLC) flash

This gives the parent's spacing formula, with every symbol now defined: where = the voltage gap between neighbouring level-centres, and = the total usable voltage span (defined next).


7 · The remaining shorthand symbols


8 · Reading, as a stack of yes/no questions

That is the same from Section 6 — one idea powering both spacing and read-count. The clever bit-labelling that keeps a one-band misread to a one-bit error is Gray coding, covered on its own page.


Prerequisite map

Charge Q on floating gate

Threshold voltage Vth

Slice into L levels

Bit = one yes-no fact

Doubling = 2 to the b

L = 2 to the b

Inverse = log base 2

Fencepost rule L minus 1

Level spacing dV

Voltage window delta V

Multi-level cell MLC TLC QLC

Read = L minus 1 comparisons


Equipment checklist

Cover the right side; can you answer before revealing?

What does physically stand for, in bucket terms?
The measured "water-level" voltage where the transistor turns on; more stored charge pushes it up.
What does count, and what picture goes with it?
The number of distinct voltage bands carved on the measuring stick.
Why does bits give patterns?
Each bit doubles the number of possibilities — a doubling tree with forks has leaves.
State in terms of , and in terms of .
and .
What question does answer?
"How many times must I double to reach ?" — it undoes .
Why is used for gaps and reads, not ?
Fencepost rule: posts create gaps between them.
What is the difference between and ?
is the whole usable span; is one gap between neighbouring level centres.
What is a P/E cycle and why does it matter?
One program-then-erase; each erase scrapes the oxide, so P/E count measures wear.
What is a "smear" and when does it cause an error?
The bell-curve spread of a level's voltage; an error occurs when two neighbouring smears overlap.

Connections

  • Multi-level cell (MLC - TLC - QLC) flash — the parent topic these foundations feed.
  • NAND Flash Architecture — where the floating-gate cell physically lives.
  • Threshold Voltage and ISPP Programming — how is set precisely.
  • Gray Code — the bit-labelling that limits misread damage.
  • Error Correction Codes (LDPC/BCH) — cleans up overlapping-smear errors.