XOR, NAND, NOR, XNOR gates: Visual walkthrough — Hardware deep dive

Before we start, we agree on the alphabet.

Our star gate:

Step 1 — Draw the target so we know what "done" looks like

WHAT. Before wiring anything, we pin down exactly what XOR must do: output $1$ when the two inputs disagree, $0$ when they agree.

WHY. You can't build a machine without its spec. The XOR truth table is the spec — four rows, four answers. Every later step is checked against these four answers.

PICTURE. The four input pairs live at the corners of a little square. Colour a corner pale yellow if XOR there is $1$ , leave it dark if $0$ . Notice the two lit corners are the diagonal — the "different" corners.

$A$	$B$	$A \oplus B$
0	0	0
0	1	1
1	0	1
1	1	0

Step 2 — Make NOT from one NAND (our first tool)

WHAT. Feed the same bit into both inputs of a NAND. Out comes its opposite.

WHY. XOR's formula contains $\overline{A}$ and $\overline{B}$ — flipped inputs. We have no NOT gate in our box, only NAND. So the very first thing we need is a way to flip a bit using NAND alone.

Here is the algebra, one symbol at a time: $A ⊼ A = \overline{A \cdot A} = \overline{A}$

$A \cdot A$ — ANDing a bit with itself gives the bit back ( $0 \cdot 0 = 0$ , $1 \cdot 1 = 1$ ); this is idempotence,
— the NAND's built-in flip then turns it into $\overline{A}$ .

PICTURE. One NAND gate, both input wires tied to the same source. Trace $A = 0$ : inside, $0 \cdot 0 = 0$ , bubble flips to $1$ . Trace $A = 1$ : $1 \cdot 1 = 1$ , bubble flips to $0$ . It's a NOT.

Step 3 — The clever middle wire: compute $M = A ⊼ B$ once

WHAT. Compute a single helper bit $M = A ⊼ B = \overline{A B}$ and reuse it in two places.

WHY. The naive XOR needs $\overline{A} B$ and $A \overline{B}$ — that looks like it wants separate NOTs and ANDs everywhere. The trick that gets XOR down to four NANDs is spotting that one shared value $M$ does double duty. Let's tabulate $M$ so we can see what it gives us.

$M = \overline{A \cdot B}$

$A \cdot B$ — AND the raw inputs,
overbar — flip it, so $M = 0$ only at the $(1, 1)$ corner.

$A$	$B$	$A \cdot B$	$M = \overline{A \cdot B}$
0	0	0	1
0	1	0	1
1	0	0	1
1	1	1	0

PICTURE. One NAND fed by $A$ and $B$ . Its output wire $M$ (drawn in chalk blue) splits and heads to two places — the two NANDs of the next step.

Step 4 — Build the two side branches $P$ and $Q$

WHAT. NAND each input with the shared $M$ : $P = A ⊼ M, Q = B ⊼ M .$

WHY. These two combinations are engineered so that $P$ becomes $0$ exactly at one "different" corner and $Q$ at the other. We compute them as tables and watch the diagonal appear.

$P = \overline{A \cdot M}, Q = \overline{B \cdot M}$

$A \cdot M$ — AND input $A$ with the helper $M$ ,
overbar — flip; $P = 0$ only when $A = 1$ and $M = 1$ together.

$A$	$B$	$M$	$A \cdot M$	$P = \overline{A \cdot M}$	$B \cdot M$	$Q = \overline{B \cdot M}$
0	0	1	0	1	0	1
0	1	1	0	1	1	0
1	0	1	1	0	0	1
1	1	0	0	1	0	1

PICTURE. Two NAND gates side by side: the top takes $A$ and $M$ giving $P$ ; the bottom takes $B$ and $M$ giving $Q$ . See how $P$ dips to $0$ on the $(1, 0)$ row and $Q$ dips to $0$ on the $(0, 1)$ row — each grabs one diagonal corner.

Step 5 — The final NAND stitches the diagonal together

WHAT. NAND the two branches: output $Y = P ⊼ Q$ .

WHY. $P$ is low at one different-corner, $Q$ is low at the other. A NAND of $(P, Q)$ gives $1$ whenever either of them is $0$ — precisely the two "different" corners. That is XOR.

$Y = P ⊼ Q = \overline{P \cdot Q}$

$P \cdot Q$ — AND the two branches; this is $1$ only when both branches are $1$ (the "same" corners),
overbar — flip, so $Y = 1$ exactly when at least one branch was $0$ (the "different" corners).

$A$	$B$	$P$	$Q$	$P \cdot Q$	$Y = \overline{P \cdot Q}$	want $A \oplus B$
0	0	1	1	1	0	0 ✅
0	1	1	0	0	1	1 ✅
1	0	0	1	0	1	1 ✅
1	1	1	1	1	0	0 ✅

PICTURE. The last NAND merges $P$ and $Q$ into $Y$ . The output column lights up on exactly the diagonal from Step 1 — spec met.

Step 6 — Walk all four corners by hand (no case skipped)

WHAT. We now trace every input pair through all four gates, so no reader ever meets a corner we didn't show.

WHY. A truth table proves what; tracing proves how the electrons flow. Cover $(0, 0), (0, 1), (1, 0), (1, 1)$ — the complete input space of two bits.

$(0, 0)$ : $M = \overline{0} = 1$ ; $P = \overline{0 \cdot 1} = 1$ ; $Q = \overline{0 \cdot 1} = 1$ ; $Y = \overline{1 \cdot 1} = 0$ . Same → $0$ . ✅
$(0, 1)$ : $M = \overline{0} = 1$ ; $P = \overline{0 \cdot 1} = 1$ ; $Q = \overline{1 \cdot 1} = 0$ ; $Y = \overline{1 \cdot 0} = 1$ . Different → $1$ . ✅
$(1, 0)$ : $M = \overline{0} = 1$ ; $P = \overline{1 \cdot 1} = 0$ ; $Q = \overline{0 \cdot 1} = 1$ ; $Y = \overline{0 \cdot 1} = 1$ . Different → $1$ . ✅
$(1, 1)$ : $M = \overline{1} = 0$ ; $P = \overline{1 \cdot 0} = 1$ ; $Q = \overline{1 \cdot 0} = 1$ ; $Y = \overline{1 \cdot 1} = 0$ . Same → $0$ . ✅

PICTURE. Four mini copies of the full circuit, each with its bits written on every wire — a filled-in worksheet of all cases.

Step 7 — The degenerate check: what if $A = B$ ?

WHAT. Feed identical bits ( $A = B$ ) and confirm the output collapses to $0$ .

WHY. The whole point of XOR is "difference detector". So when there is no difference, it must read $0$ . This is the edge case that separates XOR from plain OR (which the parent warned about).

$A = B = 0$ : from Step 6, $Y = 0$ . Agree → $0$ . ✅
$A = B = 1$ : from Step 6, $Y = 0$ . Agree → $0$ . ✅

Compare with OR, which would give $1$ at $(1, 1)$ . Our NAND-built XOR correctly gives $0$ there — this single corner is the entire difference between OR and XOR.

PICTURE. The two "equal" corners highlighted on the square, both dark ( $0$ ), with an arrow pointing at $(1, 1)$ labelled "where OR $= 1$ but XOR $= 0$ ".

The one-picture summary

Everything on one board: raw inputs $A, B$ → NAND to $M$ → two NANDs to $P, Q$ → final NAND to $Y = A \oplus B$ , with the four-corner truth table riding alongside.

Recall Feynman retelling — explain it to a friend

Imagine you only own one kind of LEGO brick: the NAND brick, which lights up unless both its studs are pressed. First trick: press both studs with the same finger and the brick becomes a "flipper" (NOT) — that's Step 2. Now the plan: take your two switches $A$ and $B$ , and make one shared clue brick $M$ that goes dark only when both switches are on. Hand that clue to two more bricks — one paired with $A$ , one paired with $B$ . The $A$ -brick goes dark only in the corner where " $A$ is on but they differ"; the $B$ -brick goes dark only in the opposite different-corner. The last brick watches those two: it lights up whenever either one went dark — i.e. whenever the switches disagree. Press both switches the same way and nothing goes dark, so the last brick stays off. Four identical bricks, and you've built "are these two different?" — the exact gate inside every adder and parity checker. That's why chip factories only need to master one brick.

Recall

A ⊼ A

equals?

\overline{A}

— tying both inputs together turns a NAND into a NOT.

The shared helper

M

in the 4-NAND XOR equals?

M = \overline{A \cdot B}

(i.e.

A NAND B

), reused by both branches.

At which input pair do OR and XOR disagree?

(1, 1)

— OR gives

1

, XOR gives

0

How many NAND gates build an XOR here?

Four.

Full NAND-only expression for XOR?

(A ⊼ (A ⊼ B)) ⊼ (B ⊼ (A ⊼ B))

Why trace all four corners instead of one?

A faulty circuit can match on 3 rows and fail the 4th; only all cases prove correctness.

Connections

Parent: XOR, NAND, NOR, XNOR gates — this page derives its 4-NAND XOR in pictures
Universal Gates — why one NAND type suffices for everything
AND, OR, NOT gates — the primitives we re-earned from NAND
Boolean Algebra Laws — idempotence ( $A \cdot A = A$ ) and De Morgan behind the tricks
Sum of Products (SOP) — the $\overline{A} B + A \overline{B}$ target we matched
Half Adder and Full Adder — this XOR is the sum bit
Parity Bits & Error Detection — chained XOR = parity
Karnaugh Maps — simplifying such gate expressions

Visual walkthrough — XOR, NAND, NOR, XNOR gates