Radiation effects — TID, SEE, displacement damage

Core Concept

Space radiation damages electronics through three distinct physical mechanisms: Total Ionizing Dose (TID), Single Event Effects (SEE), and Displacement Damage (DD). Each mechanism attacks different aspects of semiconductor device physics, requiring different mitigation strategies.

Total Ionizing Dose (TID)

Physical Mechanism — Why TID Damages Electronics

Step 1: Ionization in oxide When an energetic particle (electron, proton, heavy ion) passes through silicon dioxide insulating layers:

$E_{\text{deposited}} = \int \frac{dE}{dx} \, ds$

where $\frac{dE}{dx}$ is the linear energy transfer (LET) — energy lost per unit path length.

Why this matters: SiO₂ has bandgap ~9 eV. A1 MeV proton creates ~10⁵ electron-hole pairs in a 1 μm oxide layer.

Step 2: Charge separation Electrons (mobile) are swept away by electric fields in nanoseconds. Holes (less mobile in SiO₂) drift slowly and many become trapped at defect sites:

$N_{\text{trapped}} = f{\text{trap}} \cdot \frac{\text{Dose} \cdot \rho \cdot t_{\text{ox}}}{E_{\text{pair}}}$

where:

• $f_{\text{trap}}$ = trapping fraction (~0.01-0.3 for SiO₂)
• $\rho$ = material density
• $t_{\text{ox}}$ = oxide thickness
• $E_{\text{pair}}$ = energy to create electron-hole pair (~18 eV in SiO₂)

Why this step: The trapped positive charge creates an electric field that shifts the transistor threshold voltage.

Step 3: Threshold voltage shift For a MOSFET, the trapped charge $Q_{\text{trap}}$ causes:

$\Delta V_{\text{th}} = -\frac{Q_{\text{trap}}}{C_{\text{ox}}} = -\frac{q \cdot N_{\text{trapped}}}{C_{\text{ox}}}$

where $C_{\text{ox}} = \frac{\epsilon_{\text{ox}}}{t_{\text{ox}}}$ is the oxide capacitance per unit area.

Physical insight: Negative shift for n-channel (device turns on easier, increases leakage). Positive shift for p-channel (may fail to turn on).

$\text{TID}(t) = \int_0^t D_{\text{rate}}(\vec{r}(t'), \text{shielding}) \, dt'$

Typical rates:

• LEO (IS altitude): 1-10 rad/day behind2.5 mm Al
• GEO: 10-100 rad/day (electrons dominant)
• Interplanetary: ~10 rad/day (solar/galactic cosmic rays)

Derivation note: Actual dose depends on orbital inclination, solar cycle (affects trapped electron populations), and shielding geometry.

Step 1: Estimate dose rate Using AP-8/AE-8 trapped particle models: $D_{\text{rate}} \approx 5 \text{ rad(Si)/day}$

Step 2: Calculate total dose $\text{TID}_{5\text{yr}} = 5 \, \frac{\text{rad}}{\text{day}} \times 365 \times 5 = 9125 \text{ rad}$

Step 3: Check device rating If microcontroller rated to 10 krad (typical commercial CMOS):

• Margin: 10,000 - 9,125 = 875 rad (~10% margin — inadequate!)
• Risk: Threshold shifts → increased leakage → thermal runaway

Why this step matters: You need 2-3× margin for uncertainties in dose rate models, manufacturing variations, dose rate effects (low dose rates can cause MORE damage in some oxides due to anealing competition).

Fix: Use rad-hard CMOS (100 krad+) or add more shielding (exponential diminishing returns — 10 mm Al only reduces dose by ~2×).

Single Event Effects (SEE)

Physical Mechanism — From Ionization Track to Bit Flip

Step 1: Charge deposition A heavy ion (e.g., Fe⁵⁶ from galactic cosmic rays) with LET = 40MeV·cm²/mg passes through a transistor:

$Q_{\text{collected}} = \frac{\text{LET} \cdot \rho \cdot L}{E_{\text{pair}}}$

where $L$ is the sensitive depth (~1-10 μm).

Example: In silicon ($\rho = 2.33$ g/cm³, $E_{\text{pair}} = 3.6$ eV): $Q_{\text{collected}} = \frac{40 \times 10^6 \text{ eV} \cdot 2.33 \text{ g/cm}^3 \cdot 5 \times 10^{-4} \text{ cm}}{3.6 \text{ eV}} \times 1.6 \times 10^{-19} \text{ C} \approx 2 \text{ pC}$

Step 2: Charge collection Charge collected by drift (in depletion region, fast ~ps) and diffusion (in neutral regions, slower ~ns):

$I(t) = I_{\text{drift}}(t) + I_{\text{diff}}(t)$

Peak current can reach miliamps in modern nanoscale devices.

Step 3: Circuit response If collected charge exceeds critical charge $Q_{\text{crit}}$:

$Q_{\text{crit}} = C_{\text{node}} \cdot V_{\text{crit}}$

where $C_{\text{node}}$ is the node capacitance and $V_{\text{crit}}$ is the voltage swing needed to flip the state.

Why smaller is more vulnerable: Modern7 nm nodes have $C_{\text{node}} \sim 0.1$ fF, so $Q_{\text{crit}} \sim 0.1$ fC — 100× more sensitive than 1990s technology.

$R_{\text{SE}} = \int \sigma(\text{LET}) \cdot \Phi(\text{LET}) \, d(\text{LET})$

where:

• $\sigma(\text{LET})$ = cross-section (effective area) for SE at given LET, in cm²/bit
• $\Phi(\text{LET})$ = particle flux vs. LET, in particles/(cm²·sr·sMeV·mg⁻¹·cm²)

Weibull fit for cross-section: $\sigma(\text{LET}) = \sigma_{\text{sat}} \left(1 - e^{-\left(\frac{\text{LET} - \text{LET}_{\text{th}}}{\lambda}\right)^s}\right)$

• $\text{LET}_{\text{th}}$ = threshold LET below which no upsets occur
• $\sigma_{\text{sat}}$ = saturation cross-section (geometric device area)
• $\lambda, s$ = fitting parameters

Step 1: Get GEO heavy ion flux Using CREME96 model for solar minimum: $\Phi_{\text{total}} \approx 10 \text{ ions/(cm}^2\text{·day)} \text{ for LET} > 5 \text{ MeV·cm}^2\text{/mg}$

Step 2: Calculate upset rate per bit $R_{\text{bit}} = \sigma_{\text{sat}} \cdot \Phi_{\text{total}} = 10^{-7} \text{ cm}^2 \times 10 \frac{\text{ions}}{\text{cm}^2\text{·day}} = 10^{-6} \text{ upsets/(bit·day)}$

Step 3: Total device upset rate $R_{\text{device}} = R_{\text{bit}} \times N_{\text{bits}} = 10^{-6} \times 10^9 = 10^3 \text{ upsets/day}$

Why this matters: ~1 upset per minute — unusable without error correction!

Mitigation: EDAC (Error Detection And Correction) — e.g., Haming codes add ~12% overhead but correct all single-bit errors, detect double-bit errors.

Single Event Latchup (SEL) — The Destructive Mode

Mechanism: Ionization track triggers parasitic PNPN thyristor structure in CMOS:

1. Heavy ion creates electron-hole pairs
2. Electrons/holes drift to nearby wells
3. Activate parasitic NPN and PNP bipolar transistors
4. Positive feedback: $I_{\text{latch}} = \frac{V_{\text{dd}}}{R_{\text{on}}}$ → can exceed 1 A → device destruction

Current latchup physics: $\alpha_{\text{PNP}} \cdot \alpha_{\text{NPN}} > 1$

where $\alpha$ are current gains of parasitic bipolars.

Why modern CMOS is safer: Triple-well processes isolate n-wells from p-substrate, breaking one parasitic path.

Displacement Damage

Physical Mechanism — Non-Ionizing Energy Loss (NIEL)

Step 1: Nuclear collision Incoming proton with kinetic energy $E_p$ scatters off silicon nucleus:

$E_{\text{recoil}} = \frac{4 M_p M_{\text{Si}}}{(M_p + M_{\text{Si}})^2} E_p \sin^2(\theta/2)$

Maximum recoil energy: $E_{\text{max}} \approx 0.13 \cdot E_p$ for head-on collision.

Threshold for displacement: $E_d \approx 25$ eV for Si — much lower than ionization threshold.

Step 2: Cascade If $E_{\text{recoil}} > E_d$, the recoiling Si atom (PKA = Primary Knock-on Atom) creates a displacement cascade:

$N_{\text{displaced}} \approx \frac{E_{\text{recoil}}}{2 E_d}$

A 10 MeV proton can displace ~30,000 atoms in a single collision!

Step 3: Defect formation Most displaced atoms recombine quickly. Stable defects form at ~0.1-1% of initial displacements:

• Vacancy (V): missing Si atom
• Interstitial (I): extra Si atom between lattice sites
• Complexes: V-O (vacancy-oxygen), V-V, etc.

These act as Shockley-Read-Hall recombination centers.

$\frac{1}{\tau(\Phi)} = \frac{1}{\tau_0} + K_\tau \cdot \Phi_{\text{eq}}$

where:

• $\tau_0$ = initial lifetime
• $K_\tau$ = damage coefficient (material/device dependent)
• $\Phi_{\text{eq}}$ 1 MeV neutron equivalent fluence (all particles normalized to 1 MeV neutron NIEL)

Equivalent fluence: $\Phi_{\text{eq}} = \int \frac{\text{NIEL}(E)}{\text{NIEL}_{\text{1 MeV n}}} \cdot \Phi(E) \, dE$

Step 1: Calculate equivalent fluence GEO proton spectrum (trapped belts) gives ~$10^{11}$ protons/(cm²·year) equivalent.

$\Phi_{\text{eq, 10yr}} = 10^{12} \text{ MeV-n-eq/cm}^2$

Step 2: Apply damage equation For GaAs solar cells: $\frac{P(\Phi)}{P_0} = 1 - C \log_{10}\left(1 + \frac{\Phi_{\text{eq}}}{\Phi_x}\right)$

Typical: $C = 0.03$, $\Phi_x = 3\times 10^{10}$ cm⁻².

$\frac{P(10^{12})}{P_0} = 1 - 0.03 \log_{10}\left(1 + \frac{10^{12}}{3 \times 10^{10}}\right) = 1 - 0.03 \times 1.52 = 0.954$

Result: 4.6% power loss from displacement damage alone.

Why this step: Must oversize arrays by 1/(1-degradation) = 1.048× or ~5% to maintain end-of-life power.

Step 3: Add TID effects Coverglass darkening (TID in glass) adds another ~2-3% loss → total 7-8% degradation → size arrays at 1.08× beginning-of-life requirement.

Comparison Table — Know Which Threat You're Fighting

| Mechanism | Particle | Timescale | Effect | Anealing? | |-----------|----------|--------|------------| | TID | Electrons, protons, gamas | Years (cumulative) | Threshold shifts, leakage | Partial (thermal, but worsens first) | | SEE | Heavy ions, protons | Instant (random) | Bit flips, latchup, burnout | N/A (discrete events) | | DD | Protons, neutrons | Years (cumulative) | Lifetime degradation | Minimal (<10% at room temp) |

The steel-man: For low-energy particles (< 10 MeV), yes. For galactic cosmic ray heavy ions (GeV energies), shielding is nearly useless — even 1 meter of aluminum only reduces flux by ~2×.

Worse: Shielding creates secondary particles via nuclear fragmentation. A high-energy proton hitting aluminum produces neutrons, pions, light ions — sometimes increasing the dose behind the shield!

The nuance:

• TID: Optimize shielding thickness (2-5 mm Al typical)
• SEE from heavy ions: Shielding ineffective → use EDAC, redundancy, rad-hard design
• SE from protons: Moderate shielding helps (protons less penetrating than ions)

Correct approach: Dose-depth curves — calculate dose vs. shielding thickness for your specific orbit and particle environment. There's an optimal thickness beyond which you're just adding mass.

The failure mode: Ground testing uses:

• High dose rates (1-100 rad/s) — actual space is 10⁻⁵ rad/s
• Room temperature — orbit may be -40°C to +80°C
• Specific test particles — actual orbit has mixed spectrum

Low dose rate enhancement (LDRE): Some oxides show MORE damage at low dose rates because slow hole trapping competes with anealing. A part passing 100 krad at high rate may fail at 50 krad on orbit!

Temperature effects: Anealing speeds up at high temps (helps TID), but some defects more stable (worsens DD).

The fix:

1. Request testing at mission-relevant dose rates and temps
2. Apply uncertainty factors (2× for critical parts)
3. Use heritage parts with proven flight performance

Mitigation Strategy Matrix

TID mitigation:

• Rad-hard-by-design (RHBD) processes (SOI, enclosed-gate transistors)
• Shielding optimization
• Device selection (test to mission dose + margin)
• Voltage derating (lower E-fields reduce trapping)

SEE mitigation:

• SEU: EDAC, TMR (Triple Modular Redundancy), scrubing
• SEL: Current limiting, watchdog timers, latchup-immune processes
• SEB/SEGR: Voltage derating, device selection (wide-bandgap materials)

DD mitigation:

• Oversize solar arrays
• Select devices with high initial lifetime
• Use materials less sensitive to DD (InGaP better than Si for solar cells)
• No effective shielding — design around degradation

TID is like the walls of your phone's circuits slowly getting dirty over years. Dirt builds up (trapped electric charges), and eventually buttons stop working right (transistors change how they turn on/off).

SEE is like a lightning bolt hitting your phone's memory. Suddenly a0 becomes a 1, and your saved game gets corrupted. Or even worse, it creates a short circuit that fries the chip instantly!

Displacement damage is like someone shaking your phone so hard that atoms in the solar panel get knocked out of place. The panel still works but makes less electricity because it's got tiny holes in its structure.

Engineers deal with this by:

• Using tougher "space-grade" electronics (like a rugedized phone case, but for the circuits themselves)
• Having backup copies of everything (if one memory bit flips, two other copies vote it down)
• Making solar panels bigger than needed so when they get weaker, there's still enough power

It's why space stuff costs so much — everything has to survive this invisible bullet storm for years!

Visual: TID is rust, SEE is lightning, DD is termites

Connections

• Spacecraft Orbits — orbit determines radiation environment (LEO vs GEO vs interplanetary)
• Van Allen Belts — trapped proton/electron belts are primary TID/DD source for Earth orbit
• Solar Activity Cycles — solar max/min affects trapped electron populations (factor of 10×)
• Semiconductor Physics — band structure, E-field in oxides, minority carrier lifetime underpin all three mechanisms
• Error Correcting Codes — Hamming, Reed-Solomon for SEU mitigation
• Photovoltaic Systems — solar cell degradation from DD
• Power Budget — must account for 5-10% solar array degradation
• Reliability Engineering — FIT rates, bathtub curve affected by radiation-induced infant mortality

#flashcards/physics

What are the three primary radiation damage mechanisms in spacecraft electronics? :: Total Ionizing Dose (TID), Single Event Effects (SEE), and Displacement Damage (DD).

Name three SEU mitigation techniques :: Error Detection And Correction (EDAC), Triple Modular Redundancy (TMR), and periodic memory scrubbing.

Concept Map

Hinglish (regional understanding)