Foundations — Multicore vs manycore designs

Before you can read the parent note Multicore vs Manycore Designs, you need to earn every symbol it throws at you. This page builds each one from nothing, in an order where each idea leans on the one before it. Nothing here assumes you have seen a CPU diagram before.

1. What is a "core"? (the picture behind everything)

A chip (the black square you see when you open a computer) can hold many such workers side by side. That is the entire subject of this chapter: how many workers, and how clever each one is.

Look at the figure. On the left, one big worker with a huge desk (lots of tools). On the right, many small workers with tiny desks. Same total floor space. This is the tradeoff, drawn once so you never forget it.

2. Die area $A$ — the "floor space" symbol

The parent note writes things like $A_{\text{total}}$, $A_{\text{core}}$, $A_{\text{cache}}$. The letter $A$ just means area — how much room a thing takes up on the chip surface.

The little subscripts (the small words below the letter) just say which area we mean:

3. The counting symbol $N$

$N$ is the star of the whole topic. Every formula asks the same question in disguise: what happens as $N$ grows?

Here is the first payoff, straight from the area idea. If the whole chip is $A_{\text{total}}$ and each core needs $A_{\text{simple}}$, then the number of cores you can fit is:

$N=\frac{A_{\text{total}}}{A_{\text{per core}}}$

This is just division = "how many times does the small thing fit inside the big thing?" — the same reason you divide a pizza's area by a slice's area to count slices. A tiny core ($0.2{\text{mm}}^2$) fits 50× more often than a fat core ($10{\text{mm}}^2$), which is exactly the parent's "1 complex core ≈ 50 simple cores".

4. Clock speed $f$ — the "how fast each worker ticks" symbol

Picture a metronome next to each worker. A $4\text{GHz}$ metronome ticks 4 billion times a second; the worker can act once per tick.

5. IPC — instructions per tick

Do not confuse $f$ and IPC:

• $f$ = how many ticks per second (metronome speed)
• IPC = how much you get done per tick (how many hands the worker has)

The figure shows one clever core (4 boxes cleared per tick) beside four simple cores (1 box each per tick). Notice: four simple cores together also clear 4 boxes per tick — but only if there are four independent jobs to hand out. Hold that thought; it is why manycore needs "data parallelism".

6. Latency vs Throughput — the two ways to be "fast"

This is the deepest confusion in the whole topic, so we define both with one picture.

Look at the two checkout lanes in the figure. One express lane with a lightning-fast cashier gives low latency — your items are scanned in seconds. A row of ten slow cashiers gives high throughput — the store serves more customers per minute overall, even though each customer waits longer.

The throughput formula in the parent note is now readable:

$\text{Throughput}=N_{\text{cores}}\times f_{\text{clock}}\times \text{IPC}\times \text{Utilization}$

In plain words: (how many workers) × (ticks per second each) × (jobs per tick each) × (fraction of time actually working). It is just multiplying the four ideas you now own.

7. Utilization $U$ — the "fraction actually busy" symbol

8. The parallel fraction $P$ — the key to Amdahl's Law

Picture a job as a bar. Colour part of it "shareable" (length $P$) and part "must-do-alone" (length $1-P$). Handing the shareable part to $N$ workers shrinks it to $P/N$. The alone part never shrinks.

That single picture is the speedup formula:

$\text{Speedup}=\frac{1}{(1-P)+\frac{P}{N}}$

• The $(1-P)$ term = the stubborn alone part (never shrinks).
• The $P/N$ term = the shareable part, split $N$ ways.

The full derivation lives in Amdahl's Law; here you only need to recognise every symbol on sight.

How these foundations feed the topic

Read it top to bottom: the core and area ideas create the number-of-cores tradeoff; clock, IPC, utilization build the throughput lens; latency vs throughput and Amdahl's $P$ decide which philosophy wins for a given job.

Related foundations to explore next

• Thread-Level Parallelism — how independent jobs are handed to cores.
• SIMD vs MIMD — the two flavours of "many workers at once".
• Cache Coherence — the headache of workers sharing memory.
• Memory Hierarchy — why cache area $A_{\text{cache}}$ matters so much.
• Power Consumption — why slow, simple cores let you pack more in.
• Heterogeneous Computing — putting big and small cores on the same chip.

Equipment checklist

Cover the right side and test yourself. If any answer is fuzzy, re-read that section before the parent note.