Addressing modes: Question bank — Hardware deep dive

Reminders used below, all built in the parent note: $A$ = the address/displacement field carried inside the instruction word; $(R)$ = the contents of register $R$ ; $M [x]$ = the contents of memory at address $x$ ; $E A$ = the effective address, the final location of the operand once the mode's rule is applied.

True or false — justify

True or false: immediate mode performs one memory access to fetch its operand.

False. The operand is the field

A

inside the instruction word, so it arrives with the opcode during instruction fetch — zero extra memory accesses for the operand.

True or false: in direct (absolute) mode

E A

equals the operand value.

False. In direct mode

E A = A

is the address; the operand is

M [A]

, the contents at that address.

E A

is a location, not a value.

True or false: register mode and register-indirect mode both cost zero memory accesses.

False. Register mode reads the operand straight from the register (0 accesses), but register-indirect uses

(R)

as an address, so it reads memory once:

E A = (R)

, operand

= M [(R)]

True or false: indirect mode always needs exactly two memory accesses to get the operand.

True for memory-indirect: one read to fetch the pointer

M [A]

, a second to fetch the operand

M [M [A]]

. That extra read is the price of indirection.

True or false: PC-relative branches store the absolute address of their target.

False. They store an offset

A

; the CPU computes

E A = P C + A

. Storing distance rather than a fixed address is exactly what makes the code relocatable.

True or false: displacement mode

E A = A + (R)

and indexed mode

E A = A + (R_{i})

use different arithmetic.

False. The arithmetic is identical (constant plus register). Only the roles differ: displacement treats

R

as a fixed base and

A

as the varying-at-compile-time offset; indexed treats

A

as the base and

R_{i}

as the loop-varying index.

True or false: adding more addressing modes always makes programs run faster.

False. Fancy modes cut instruction count but can lengthen decode logic and the pipeline critical path — a classic RISC vs CISC trade-off, not a free win.

True or false: immediate mode can hold an arbitrarily large constant.

False. The constant lives in the instruction's

A

field, so its range is capped by that field's bit width. Larger constants need extra instructions or a memory load.

Spot the error

LOAD (100) is indirect, so the operand is

M [100]

. Where's the error?

The parentheses mean indirect:

E A = M [100]

first (the pointer), then operand

= M [M [100]]

. Reading just

M [100]

is the direct answer.

"Register-indirect reads the register, gets a value, and that value is the operand." Error?

The register's contents are used as an address, not the operand.

E A = (R)

, then the operand is

M [(R)]

— one memory read still happens.

"PC-relative branch: I loaded the program 1000 bytes higher, so I must patch every branch's stored number." Error?

You don't patch anything. Branches store relative offsets, so

P C + A

shifts together with the code; that's the whole point of position independence.

"Auto-increment (R1)+ increments R1 first, then reads memory." Error?

For auto-increment the read happens at the current value first (

E A = (R)

), then

R

steps up. It's auto-decrement that adjusts the register before the access.

"Direct mode is best for big arrays because you just name each element's address." Error?

Direct needs a full-width address baked in per access and can't loop by varying a register. Arrays use displacement/indexed mode so one base register plus a changing offset walks all elements cheaply.

"Displacement mode costs two memory accesses: one for A+(R) and one for the operand." Error?

Computing

A + (R)

is arithmetic inside the CPU (ALU), not a memory access. Only the operand fetch

M [A + (R)]

touches memory — one access total.

Why questions

Why does indirect mode exist if it costs an extra memory access?

Because the target address can be decided at run time — following pointers, linked lists, and dispatch tables (Pointers and Arrays) needs an address stored in data, which only a memory read can supply.

Why is displacement mode

E A = A + (R)

called the "workhorse"?

It maps directly onto real code:

R

holds a base (array start, struct address, or stack-frame pointer) and

A

is a small compile-time offset, so array[i], struct.field, and local variables all become one cheap instruction.

Why do stacks favour auto-increment / auto-decrement?

Push and pop must move the stack pointer every time. Baking the

\pm d

step into the access means push/pop need no separate add/subtract instruction.

Why is PC-relative addressing essential for shared/relocatable code?

Because the operating system may load the program at any base address; offsets from

P C

stay valid wherever the code lands, whereas absolute targets would break.

Why does immediate mode give the fastest operand access?

The value travels inside the instruction already fetched, so there is no separate address to compute and no memory hierarchy round-trip — zero extra accesses.

Why might a RISC design deliberately support only a few addressing modes?

Fewer modes mean simpler, more uniform decoding and a shorter, more pipelineable critical path — trading per-instruction cleverness for higher clock speed and throughput.

Edge cases

What is the operand when

A = 0

in immediate mode?

The operand is simply the constant

0

; no memory is touched. Contrast direct mode where

A = 0

would mean "read

M [0]

", an actual location.

In indirect mode, what happens if the pointer cell

M [A]

holds

A

itself (self-pointer)?

E A = M [A] = A

, so operand

= M [A]

again — one level of indirection resolves fine; the CPU only follows the pointer a fixed number of times, it does not loop endlessly.

For auto-increment, why does the word size

d

(not always 1) matter?

The register must step by the size of one element, so byte data uses

d = 1

but a 4-byte word uses

d = 4

; using the wrong

d

would skip or overlap elements.

In auto-decrement, if

R

is decremented below the valid range, what is the danger?

R

can underflow past the allocated region (e.g. stack overflow into other data), because the mode blindly does

R \leftarrow R - d

before reading — bounds are the programmer's responsibility, not the mode's.

For PC-relative mode, what does an offset of

A = 0

compute to?

E A = P C + 0 = P C

, i.e. the current instruction's reference point itself — effectively a branch-to-self or a no-displacement reference, a legal but usually degenerate case.

If register-indirect uses a register holding an address that equals another register's contents, do the two modes still differ?

The arithmetic result can coincide, but the modes are defined by their rule, not the runtime value; the distinction between register-indirect (

E A = (R)

) and base+index (

E A = (R_{b}) + (R_{i})

) still stands even when numbers happen to match.

Recall One-sentence survival rule

Every mode is a formula for $E A$ plus a count of memory accesses — commit those two facts per mode and no trap on this page can catch you.