Photolithography process steps

The 8 steps (in order)

WHY each step exists

Intuition Reasoning through the recipe

Clean/dehydrate → dust becomes a defect; water ruins adhesion. WHAT: get a pristine surface.
HMDS prime → bare oxide is hydrophilic, resist is organic; without a "primer" the resist peels during development. HOW: HMDS makes the surface hydrophobic so resist bonds.
Spin coat → we need a flat, thin, uniform film; spinning uses centrifugal force to fling off excess. Thickness must be controlled because it sets resolution and etch protection.
Soft bake → solvent left in the film scatters light and sticks the mask; baking evaporates it.
Expose → this is the pattern-writing step; UV changes resist chemistry only where light lands.
PEB → the incoming and reflected light waves interfere, making wavy sidewalls (standing waves); a gentle bake smooths them.
Develop → chemically remove the soluble resist to reveal the actual pattern.
Hard bake → the wafer next faces harsh etch/plasma; a hardened resist survives it.

The one formula you must derive: Resolution

Intuition WHY this shape — deriving it from diffraction

WHAT limits us? Light passing through a small opening diffracts. Two nearby features on the mask produce diffraction patterns; if the patterns overlap too much, the image blurs into one blob.

Derivation (Abbe/Rayleigh):

A grating of pitch $p$ diffracts light at angles given by $p\sin\theta = m\lambda$ (the grating equation). The first-order ( $m=1$ ) beam carries the info that "there is periodicity."
To form an image you must capture at least the 0th and 1st order in the lens. The lens can accept rays up to angle $\theta_{max}$ where $NA = n\sin\theta_{max}$ .
Capturing the 1st order requires $\sin\theta_{max} \ge \lambda/(n p)$ ... arranging and folding constants ( $k_1$ absorbs whether you count pitch vs half-pitch, coherence, illumination shape) gives $R \propto \frac{\lambda}{NA} \Rightarrow R = k_1\frac{\lambda}{NA}.$

HOW to read it: to shrink features you shrink $\lambda$ (deep-UV 193 nm → EUV 13.5 nm), raise $NA$ (immersion lithography puts water, $n\approx1.44$ , between lens and wafer), or lower $k_1$ (resolution enhancement tricks). But $DOF$ falls as $1/NA^2$ — pushing $NA$ makes focus brutally tight. That trade-off is the whole game.

Common mistakes (steel-manned)

Active recall

What is photolithography?

Transferring a mask pattern onto a photoresist-coated wafer using UV light so later etch/implant/deposit steps only affect selected regions.

List the 8 photolithography steps in order.

Clean/dehydrate → HMDS prime → spin coat → soft bake → align & expose → post-exposure bake → develop → hard bake.

In positive photoresist, which regions become soluble?

The UV-exposed regions become soluble and wash away in developer.

In negative photoresist, which regions become soluble?

The unexposed regions; exposed regions cross-link and remain.

What is the purpose of HMDS priming?

Adhesion promoter that makes the hydrophilic wafer surface hydrophobic so resist bonds and doesn't lift.

Why spin coat instead of pour resist?

Centrifugal force gives a thin, flat, uniform film whose thickness sets resolution and etch protection.

Purpose of soft bake?

Evaporate solvent, solidify the resist film so it doesn't stick to the mask or scatter light.

Purpose of post-exposure bake (PEB)?

Diffuse the exposure chemistry and smooth standing-wave sidewall ripples.

Purpose of hard bake?

Harden remaining resist so it survives the following etch/implant.

State the Rayleigh resolution formula.

R = k1 · λ / NA.

State the depth-of-focus formula.

DOF = k2 · λ / NA².

Three ways to reduce minimum feature size R.

Reduce wavelength λ, increase numerical aperture NA, or reduce process constant k1.

What does immersion lithography do to NA?

Uses a high-index fluid (water n≈1.44) between lens and wafer to raise effective NA above 1, shrinking R.

What is the penalty of increasing NA?

Depth of focus drops as 1/NA², so wafer flatness/focus tolerance becomes far tighter.

Define numerical aperture NA.

NA = n·sinθ, where n is the medium index and θ the max ray acceptance half-angle of the lens.

Recall Feynman: explain to a 12-year-old

Imagine you want to draw the same tiny circuit thousands of times, perfectly. You cover a shiny silver plate with a special "magic ink" (photoresist) that changes when a flashlight shines on it. You put a stencil (the mask) on top and shine a special blue-purple light. Wherever the light hits, the ink gets weak (positive) so you can rinse it away with soapy water (developer). Now the plate has your pattern in ink. You bake it hard so it's tough, then you can carve or color the plate only where there's no ink. Do this many times, layer by layer, and you've built a chip! The tiniest line you can draw depends on how short your light's wiggle (wavelength) is — shorter light draws thinner lines.

Connections

Etching (wet and dry) — uses the developed resist as the protective mask.
Ion implantation — resist openings define where dopants enter.
Photoresist chemistry — positive vs negative, diazonaphthoquinone, cross-linking.
EUV lithography — 13.5 nm light to push $R$ smaller.
Immersion lithography — raising NA above 1 with fluid.
Diffraction and Abbe limit — the physics behind resolution.
Semiconductor Fabrication overview — where lithography sits in the flow.

Concept Map

Hinglish (regional understanding)

Intuition Hinglish mein samjho

Photolithography ka matlab hai ki hum silicon wafer par circuit ka pattern light se chhaap dete hain — bilkul stencil se spray paint karne jaisa. Yaha "paint" hai photoresist (light-sensitive polymer), "stencil" hai glass mask, aur "spray" hai UV light. Steps ka order yaad rakho: pehle wafer clean karo, phir HMDS prime (taaki resist chipke), phir spin coat se patli uniform layer, phir soft bake se solvent uda do, phir mask align karke UV expose karo, phir PEB, phir develop (soluble resist dho do), aur last me hard bake taaki resist mazboot ho jaaye etch ke liye.

Positive resist me jaha light padti hai wo part soluble ho jaata hai aur dhul jaata hai; negative me ulta — exposed part cross-link hoke ruk jaata hai. Yeh choti si baat exam me trick karti hai, isliye pakka yaad rakho.

Sabse important formula: $R = k_1 \lambda / NA$ . Iska matlab — jitni choti wavelength (jaise EUV 13.5 nm) aur jitna bada NA, utne chote transistors bana sakte ho. Isiliye "nanometer race" asal me lithography ka race hai. Lekin catch yeh hai: $DOF = k_2 \lambda / NA^2$ , yaani NA badhaoge to focus tolerance $1/NA^2$ ke hisaab se gir jaata hai — wafer ko utna hi flat rakhna padta hai. Immersion lithography me lens aur wafer ke beech paani daal ke NA ko 1 se upar le jaate hain. Yahi trade-off puri chip industry ka dil hai.

The core idea

The 8 steps (in order)

WHY each step exists

The one formula you must derive: Resolution

Common mistakes (steel-manned)

Active recall

Connections

Concept Map

Hinglish (regional understanding)

Test yourself — Semiconductor Fabrication

Connections